YMF724F
b12..............PR4: AC-2 Power down Control 4
This bit controls the power state of the
“0”: | Normal | (default) |
“1”: | Power down |
|
b13..............PR5: AC-2 Power down Control 5
Setting this bit to “1” disables the internal clock of
and PSN bits to “1”. |
|
“0”: Normal | (default) |
“1”: Disable |
|
b[15:14] ......AC-2 Power down Control 6 and 7
The function of this bit is not supported by YAMAHA
Master
(24.576MHz)
DMC
PLL0
33.87MHz
DPLL0
PSL0
PSL1
PSN
Legacy func. 0
OPL3
SB Pro
Legacy func. 1
MPU401
Joystick
PCICLK (33MHz)
PLL1
49.152MHz
DPLL1
PCI func. 0
AC3F2 I/F
SRC
SPDIF
PCI func. 1
PCI I/F
PC/PCI
-Set DPLL0, DPLL1, PSL0, PSL1 and PSN bits to “1”, when DMC bit is set to “1”.
-Set PSL0 and PSL1 bits to “1”, when DPLL0 bit is set to “1”.
-Set PSN bit to “1”, when DPLL1 bit is set to “1”.
September 21, 1998