Yamaha YMF724F specifications 42 43h Extended Legacy Audio Control

Page 19

YMF724F

42 - 43h: Extended Legacy Audio Control

Read / Write

Default: 0000h

Access Bus Width: 8, 16, 32-bit

 

b15

b14

b13

b12

b11

b10

 

b9

 

b8

b7

 

b6

b5

b4

b3

 

b2

b1

 

b0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IMOD

SBVER

SMOD

-

 

-

 

MAIM

 

JSIO

MPUIO

 

SBIO

FMIO

b[1:0] ..........FMIO: FM I/O Address allocation

 

 

 

 

 

 

 

 

 

 

 

 

These bits determine the base I/O address for the of the OPL3 block (FMBase). OPL3 block uses 4

 

 

bytes in the I/O address space.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

“0”:

 

388h

 

 

(default)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

“1”:

 

398h

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

“2”:

 

3A0h

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

“3”:

 

3A8h

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

b[3:2] ..........SBIO: SB I/O Address allocation

 

 

 

 

 

 

 

 

 

 

 

 

 

These bits determine the base I/O address for the Sound Blaster Pro block (SBBase). This block uses 16

 

 

bytes in the I/O address space.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

“0”:

 

220h

 

 

(default)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

“1”:

 

240h

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

“2”:

 

260h

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

“3”:

 

280h

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

b[5:4] ..........MPUIO: MPU I/O Address allocation

 

 

 

 

 

 

 

 

 

 

 

 

These bits determine the base I/O address for the MPU401 block (MPUBase). This block uses 2 bytes

 

 

in the I/O address space.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

“0”:

 

330h

 

 

(default)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

“1”:

 

300h

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

“2”:

 

332h

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

“3”:

 

334h

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

b[7:6] ..........JSIO: Joystick I/O Address allocation

 

 

 

 

 

 

 

 

 

 

 

 

These bits determine the base I/O address for the Joystick block (JSBase). This block uses 1 byte in the

 

 

I/O address space.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

“0”:

 

201h

 

 

(default)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

“1”:

 

202h

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

“2”:

 

204h

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

“3”:

 

205h

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

b8................MAIM: MPU401 Acknowledge Interrupt Mask

This bit determine whether interrupt is asserted when the acknowledge, which is occurred by changing MPU401 mode form default to UART, is returned.

“0”: Interrupt is asserted when the acknowledge is returned. (default)

“1”: Interrupt is masked when the acknowledge is returned.

September 21, 1998

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Image 19
Contents Overview FeaturesGM system level LogosSensaura YMF724F-V PIN ConfigurationPCI Bus Interface 53-pin PIN DescriptionYMF730AC-2 Interface 6-pin Spdif Interface 1-pin YMF727AC3F2 Interface 9-pinLegacy Device Interface 16-pin Miscellaneous 15-pin Power Supply 39-pinOPL3 Block DiagramDOS VM System DiagramFunction Overview PCI Bus CommandPCI Configuration Register 00 01h Vendor ID 04 05h Command02 03h Device ID 06 07h Status 0Bh Base Class Code 08h Revision ID09h Programming Interface 0Ah Sub-class Code0Eh Header Type 0Dh Latency Timer10 13h PCI Audio Memory Base Address 2E-2Fh Subsystem ID 2C-2Dh Subsystem Vendor ID34h Capability Register Pointer 3Fh Maximum Latency 3Ch Interrupt Line3Dh Interrupt Pin 3Eh Minimum Grant40 41h Legacy Audio Control B108 ........SBIRQ Sound Blaster IRQ Channel Select B76 ..........SDMA Sound Blaster DMA-8 Channel SelectB1311 ......MPUIRQ MPU401 IRQ Channel Select 42 43h Extended Legacy Audio Control B1413 ......SBVER SB Version Select B1211 ......SMOD SB DMA modeB15..............IMOD Legacy IRQ mode 44-45h Subsystem Vendor ID Write Register46-47h Subsystem ID Write Register 4A-4Bh DS-1 Power Control Register48-49h DS-1 Control Register PSN Power Save PCI Audio block DPLL1 Disable PLL1 Clock OscillationPSL0 Power Save Legacy Audio Block PSL1 Power Save Legacy Audio BlockB13..............PR5 AC-2 Power down Control B12..............PR4 AC-2 Power down ControlB1514 ......AC-2 Power down Control 6 50h Capability ID 4C-4Dh D-DMA Slave Configuration51h Next Item Pointer 52-53h Power Management CapabilitiesB0................ACPI Acpi Mode Select 54-55h Power Management Control / Status58-59h Acpi Mode B10 ..........PS Power StateOPL3 ISA Compatible DevicePCI OPL3 Status Register RO OPL3 BlockOPL3 Data Register Array 1 R/W OPL3 Data Register Array 0 R/WSound Blaster Pro Block CMD Sound Blaster Pro Mixer SB Mixer AC-2 Sbpda Sound Blaster Power Down Acknowledgement B0................SBPDR Sound Blaster Power Down RequestSE Scan Enable SM Scan ModeB0................SBI SB Interrupt Flag F1h Scan In/ Out DataF8h Interrupt Flag Register B70 ..........SCAN DataJoystick MPU401PC/PCI DMA Emulation ProtocolDMA Digital Audio Interface Interrupt RoutingSerialized IRQ Hardware Volume Control Absolute Maximum Ratings Electrical CharacteristicsDC Characteristics Master Clock ResetPoint to Point Input Hold Time for Pciclk PCI InterfaceAC-link AC-2 / AC3F2 Master ClockInput Hold Time for Abclk AC3F2 InterfaceAC3F2 Control Interface timing OFF External DimensionsYamaha Corporation