Yamaha YMF724F F0h Scan In/ Out Control, B0................SBPDR Sound Blaster Power Down Request

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YMF724F

2-2-3. SB Suspend / Resume

The SB block can read the internal state as to support Suspend and Resume functions. The internal state is made up of 218 flip flops. To read the state, these states are shifted in order and read 8 bits at a time from the SCAN DATA register.

These registers are mapped to the SB Mixer space (see SB Mixer Register map). The registers have the following functions.

F0h: Scan In/ Out Control

Read / Write

Default: 00h

b7

b6

b5

b4

b3

b2

b1

b0

 

 

 

 

 

 

 

 

SBPDA

-

-

-

SS

SM

SE

SBPDR

b0................SBPDR: Sound Blaster Power Down Request

This bit stops the internal state of the Sound Blaster block.

“0”: Normal(default)

“1”: Stop

b1

SE: Scan Enable

This bit Shifts the internal state by 1 bit. Setting a “1” followed by a “0” shifts the internal state.

b2

SM: Scan Mode

This bit sets whether to read or write the state.

“0”: Write(default)

“1”: Read

b3

SS: Scan Select

This bit gives permission to read or write the internal data to the SCAN DATA register.

“0”: Normal operation (Do not allow read or write). (default)

“1”: Allow read and write.

b7

SBPDA: Sound Blaster Power Down Acknowledgement

This bit indicates that the SB Block is ready to read or write to the internal state after setting SBPDR. This bit is read only.

“0”: Read/Write not possible

“1”: Read/ Write possible

September 21, 1998

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Contents Overview FeaturesSensaura LogosGM system level YMF724F-V PIN ConfigurationYMF730AC-2 Interface 6-pin PIN DescriptionPCI Bus Interface 53-pin Legacy Device Interface 16-pin YMF727AC3F2 Interface 9-pinSpdif Interface 1-pin Miscellaneous 15-pin Power Supply 39-pinOPL3 Block DiagramDOS VM System DiagramFunction Overview PCI Bus CommandPCI Configuration Register 02 03h Device ID 04 05h Command00 01h Vendor ID 06 07h Status 0Bh Base Class Code 08h Revision ID09h Programming Interface 0Ah Sub-class Code10 13h PCI Audio Memory Base Address 0Dh Latency Timer0Eh Header Type 34h Capability Register Pointer 2C-2Dh Subsystem Vendor ID2E-2Fh Subsystem ID 3Fh Maximum Latency 3Ch Interrupt Line3Dh Interrupt Pin 3Eh Minimum Grant40 41h Legacy Audio Control B1311 ......MPUIRQ MPU401 IRQ Channel Select B76 ..........SDMA Sound Blaster DMA-8 Channel SelectB108 ........SBIRQ Sound Blaster IRQ Channel Select 42 43h Extended Legacy Audio Control B1413 ......SBVER SB Version Select B1211 ......SMOD SB DMA modeB15..............IMOD Legacy IRQ mode 44-45h Subsystem Vendor ID Write Register48-49h DS-1 Control Register 4A-4Bh DS-1 Power Control Register46-47h Subsystem ID Write Register PSN Power Save PCI Audio block DPLL1 Disable PLL1 Clock OscillationPSL0 Power Save Legacy Audio Block PSL1 Power Save Legacy Audio BlockB1514 ......AC-2 Power down Control 6 B12..............PR4 AC-2 Power down ControlB13..............PR5 AC-2 Power down Control 50h Capability ID 4C-4Dh D-DMA Slave Configuration51h Next Item Pointer 52-53h Power Management CapabilitiesB0................ACPI Acpi Mode Select 54-55h Power Management Control / Status58-59h Acpi Mode B10 ..........PS Power StateOPL3 ISA Compatible DevicePCI OPL3 Status Register RO OPL3 BlockOPL3 Data Register Array 1 R/W OPL3 Data Register Array 0 R/WSound Blaster Pro Block CMD Sound Blaster Pro Mixer SB Mixer AC-2 Sbpda Sound Blaster Power Down Acknowledgement B0................SBPDR Sound Blaster Power Down RequestSE Scan Enable SM Scan ModeB0................SBI SB Interrupt Flag F1h Scan In/ Out DataF8h Interrupt Flag Register B70 ..........SCAN DataJoystick MPU401PC/PCI DMA Emulation ProtocolDMA Serialized IRQ Interrupt RoutingDigital Audio Interface Hardware Volume Control Absolute Maximum Ratings Electrical CharacteristicsDC Characteristics Master Clock ResetPoint to Point Input Hold Time for Pciclk PCI InterfaceAC-link AC-2 / AC3F2 Master ClockInput Hold Time for Abclk AC3F2 InterfaceAC3F2 Control Interface timing OFF External DimensionsYamaha Corporation