IC14V VHiES3883F/-1: Video CD Encoder (ES3883F) (2/2)
Pin No. | Terminal Name | Input/Output | Function |
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45 | AOR + | Output | Right channel output. |
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46 | AOR - | Output | Right channel output. |
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47 | AOL - | Output | Left channel output. |
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48 | AOL + | Output | Left channel output. |
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49* | MIC1 | Input | Microphone input 1. |
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50* | MIC2 | Input | Microphone input 2. |
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51 | VSSAA | Input | Audio Analog ground. |
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52 | VREF | Input | Internal resistor divider generates Common Mode Reference (CMR) voltage. |
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| Bypass to analog ground with 0.1 μF. |
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53 | VREFM | Input | DAC and ADC minimum reference. Bypass to VCMR with 10 μF in parallel with 0.1 μF. |
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54 | RSET | Input | Full scale DAC current adjustment. |
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55 | COMP | Input | Compensation pin. |
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56, 57 | VSSAV | Input | Video Analog ground. |
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58* | CDAC | Output | Modulated chrominance output. |
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59, 60 | VCCAV | Input | Video VCC, 5V. |
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61* | YDAC | Output | Y luminance data bus for screen video port. |
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62, 63 | VSSAV | Input | Video Analog ground. |
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64 | VDAC | Output | Composite video output. |
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65 | ACAP | Input | Audio CAP. |
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66 | VCC | Input | Voltage supply, 5V. |
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67* | AUX6 | Input/Output | Servo XLAT or Control pin/VFD_DO. |
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68* | AUX5 | Input/Output | Servo Data or Control pin. |
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69 | AUX4 | Input/Output | Servo CCW/Close or Control pin. |
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70 | AUX3 | Input/Output | Servo CW/Limit or Control pin. |
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71 | XOUT | Output | Crystal output. |
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72 | VSS | Input | Ground. |
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73 | VCC | Input | Voltage supply, 5V. |
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74 | XIN | Input | 27 MHz crystal input. |
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75 | VSS | Input | Ground. |
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76* | NC | — | No connect. Do not connect to these pins. |
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77 | VSS | Input | Ground. |
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78 | VCC | Input | Voltage supply, 5V. |
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79 | PCLK | Input/Output | 13.5 MHz pixel clock. |
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80 | 2XPCLK | Input/Output | 27 MHz (2 times pixel clock). |
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81 | DSC_D7 | Input/Output | Data for programming to access internal registers. |
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82 | HSYN_B | Output | Horizontal sync (active low). |
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83 | DSC_D6 | Input/Output | Data for programming to access internal registers. |
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84 | VSYN_B | Output | Vertical sync (active low). |
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85 | DSC_D5 | Input/Output | Data for programming to access internal registers. |
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Input | YUV data bus for screen video port. | ||
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90 | VCC | Input | Voltage supply. 5V. |
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91 | VSS | Input | Ground. |
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92 | YUV3 | Input | YUV data bus for screen video port. |
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93 | DSC_D4 | Input/Output | Data for programming to access internal registers. |
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94 | YUV2 | Input | YUV data bus for screen video port. |
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95 | DSC_D3 | Input/Output | Data for programming to access internal registers. |
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96 | YUV1 | Input | YUV data bus for screen video port. |
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97 | DSC_D2 | Input/Output | Data for programming to access internal registers. |
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98 | YUV0 | Input | YUV data bus for screen video port. |
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99 | DSC_D1 | Input/Output | Data for programming to access internal registers. |
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100 | VSS | Input | Ground. |
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In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
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