Appendix B Technical Summary
I/O Address | Read Target | Write Target | Internal Unit |
80h | DMA Controller | DMA controller & | DMA |
|
| LPC/PCI |
|
DMA Controller | DMA Controller | DMA | |
DMA Controller | DMA Controller & | DMA | |
|
| LPC or PCI |
|
87h | DMA Controller | DMA Controller | DMA |
88h | DMA Controller | DMA Controller & | DMA |
|
| LPC or PCI |
|
DMA Controller | DMA Controller | DMA | |
DMA Controller | DMA Controller & | DMA | |
|
| LPC or PCI |
|
08Fh | DMA Controller | DMA Controller | DMA |
DMA Controller | DMA Controller | DMA | |
92h | Reset Generator | Reset Generator | Processor I/F |
DMA Controller | DMA Controller | DMA | |
Interrupt Controller | Interrupt Controller | Interrupt | |
Interrupt Controller | Interrupt Controller | Interrupt | |
Interrupt Controller | Interrupt Controller | Interrupt | |
Interrupt Controller | Interrupt Controller | Interrupt | |
Interrupt Controller | Interrupt Controller | Interrupt | |
Power Management | Power Management | Power Management | |
Interrupt Controller | Interrupt Controller | Interrupt | |
Interrupt Controller | Interrupt Controller | Interrupt | |
Interrupt Controller | Interrupt Controller | Interrupt | |
DMA Controller | DMA Controller | DMA | |
Reserved | DMA Controller | DMA | |
DMA Controller | DMA Controller | DMA | |
F0h | See Note 3 | FERR# /IGNNE#/ | Processor interface |
|
| Interrupt Controller |
|
IDE Controller1 | IDE Controller1 | Forwarded to IDE | |
IDE Controller2 | IDE Controller2 | Forwarded to IDE | |
376h | IDE Controller1 | IDE Controller1 | Forwarded to IDE |
3F6h | IDE Controller2 | IDE Controller2 | Forwarded to IDE |
Interrupt Controller | Interrupt Controller | Interrupt | |
CF9h | Reset Generator | Reset Generator | Processor interface |
Notes:
1.Only if IDE Standard I/O space is enabled for Primary Drive. Otherwise, the target is PCI.
2.Only if IDE Standard I/O space is enabled for Secondary Drive. Otherwise, the target is PCI.
3.If POS_DEC_EN bit is enabled, reads from F0h will not be decoded by the ICH2. If
POS_DEC_EN is not enabled, reads from F0h will forward to LPC.
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