Intel PPC-7508F M1 user manual Dram Timeing Selectable, CAS Latency Time, Dram RAS# to CAS# Delay

Chapter 4 Award BIOS Setup

DRAM TIMEING SELECTABLE:

The value in this field depends on performance parameters of the installed memory chips (DRAM). Do not change the value from the factory setting unless you install new memory that has a different performance rating than the original DRAMs.

CAS LATENCY TIME:

When synchronous DRAM is installed, the number of clock cycles of CAS latency depends on the DRAM timing.

DRAM RAS# TO CAS# DELAY:

This item let you insert a timing delay between the CAS and RAS strobe signals, used when DRAM is written to, read from, or refreshed. Fast gives faster performance; and Slow gives more stable performance. This field applies only when synchronous DRAM is installed in the system. The choices are 2 and 3.

DRAM RAS# PRECHARGE TIME:

If an insufficient number of cycles is allowed for the RAS to accumulate its charge before DRAM refresh, the refresh may be incomplete and the DRAM may fail to retain data. Fast gives faster performance; and Slow gives more stable performance. This field applies only when synchronous DRAM is installed in the system. The choices are 2 & 3.

SYSTEM BIOS CACHEABLE:

Selecting Enabled allows caching of the system BIOS ROM at F0000h- FFFFFh, resulting in better system performance. However, if any program writes to this memory area, a system error may result.

VIDEO BIOS CACHEABLE:

Select Enabled allows caching of the video BIOS, resulting in better system performance. However, if any program writes to this memory area, a system error may result.

On-Chip VGA

To Enable/Disable the onboard display chip.

Boot Display

To select the boot-up display type.

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