Intel PPC-7508F M1 user manual B-8

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Appendix B Technical Summary

Memory Decode Ranges From Processor Perspective :

Memory Range	Target	Dependency/Comments
0000 0000h-000D FFFFh	Main Memory	TOM registers in Host Controller
0010 0000-TOM (Top of
Memory)
000E 0000h-000F FFFFh	FWH	Bit 7 in FWH Decode Enable
		Register is set
FEC0 0000h-FEC0 0100h	I/O APIC inside ICH2
FFC0 0000h-FFC7 FFFFh	FWH	Bit 0 in FWH Decode Enable
FF80 0000h-FF87 FFFFh		Register
FFC8 0000h-FFCF FFFFh	FWH	Bit 1 in FWH Decode Enable
FF88 0000h-FF8F FFFFh		Register
FFD0 0000h-FFD7 FFFFh	FWH	Bit 2 in FWH Decode Enable
FF90 0000h-FF97 FFFFh		Register is set
FFD8 0000h-FFDF FFFFh	FWH	Bit 3 in FWH Decode Enable
FF98 0000h-FF9F FFFFh		Register is set
FFE0 0000h-FFE7 FFFFh	FWH	Bit 4 in FWH Decode Enable
FFA0 0000h-FFA7 FFFFh		Register is set
FFE8 0000h-FFEF FFFFh	FWH	Bit 5 in FWH Decode Enable
FFA8 0000h-FFAF FFFFh		Register is set
FFF0 0000h-FFF7 FFFFh	FWH	Bit 6 in FWH Decode Enable
FFB0 0000h-FFB7 FFFFh		Register is set
FFF8 0000h-FFFF FFFFh	FWH	Always Enabled.
FFB8 0000h-FFBF FFFFh		The top two 64K blocks of this
		range can be swapped as
		described in Section 6.4.1.
FF70 0000h-FF7F FFFFh	FWH	Bit 3 in FWH Decode Enable 2
FF30 0000h-FF3F FFFFh		Register is set
FF60 0000h-FF6F FFFFh	FWH	Bit 2 in FWH Decode Enable 2
FF20 0000h-FF2F FFFFh		Register is set
FF50 0000h-FF5F FFFFh	FWH	Bit 1 in FWH Decode Enable 2
FF10 0000h-FF1F FFFFh		Register is set
FF40 0000h-FF4F FFFFh	FWH	Bit 0 in FWH Decode Enable 2
FF00 0000h-FF0F FFFFh		Register is set
Anywhere in 4GB range	D110 LAN Controller	Enable via BAR in Device
		29:Function 0 (D110 LAN
		Controller)
All Other	PCI	None

Page: B-8

PPC-7508F USER′S MANUAL

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Contents USER’S Manual PPC-7508F Panel PC System FCC Notice Table of Contents Software Utilities Appendix B Technical Summary Introduction System Configuration About this ManualCase Illustration System Specifications Mainboard PROX-7500Display LCD Panel Touch Screen Handling Check the Line VoltageEnvironmental Conditions Good CareSystem Configuration Jumper & Connector Quick Reference Table JP8PPC-7508F Connector, Jumper and Component locations Component LocationsHOW to SET the Jumpers Jumpers and CapsJumper Diagrams Jumper Settings PPC-7508F Jumper Illustration COM 1 RI & Voltage Selection Pin ClosedCOM 2 RI & Voltage Selection COM 3 RI & Voltage Selection COM 4 RI & Voltage Selection RS232/422/485 COM2 Selection Default Brightness Voltage SelectionLvds Voltage Selection Lvds Panel Resolution Selection Default Open Cmos Function SelectionReset / NMI Selection NMICpuvcca Voltage Selection CPU Frequency Selection 100 MHzCOM Port Connector RS-232 RS-422 RS-485COM3 COM3 Connector Pin assignments are as follows VGA Connector Lvds Connector Power Connector Hard Disk Drive Connector PIN AssignmentPrinter Connector LAN Connector LAN LED ConnectorKeyboard Connector 25. PS/2 Mouse ConnectorPower LED Connector HDD LED ConnectorPower Button Universal Serial BUS Connector 5VUSB2 Memory Installation Inverter ConnectorPower Module Compact Flash Connector CF1 Compact Flash Connector Pin assignments are as followsPCI-104 Connector PC104PLUS1 PCI-104 Connector Pin assignments are as followsSerial ATA Connector CPU FAN ConnectorSystem FAN Connector Reset & Speaker Connector Software Utilities Introduction Filename Purpose Assume that CD ROM drive is DInstallation of VGA Driver VGA Driver UtilityIntroduction Flash Bios UpdateInstallation of system Bios Page3-5 LAN Driver Utility Installation Procedure for Windows 9x/NT/2000/XP Sound Driver UtilityIntel Chipset Software Installation Utility Installation of Utility for Windows 2000/XPTouch Screen Driver Utility USB2.0 Software Installation UtilityInstallation of Utility for Windows 98SE/ 2000/XP Watchdog Timer Configuration Award Bios Setup Introduction Entering Setup Setup program initial screenStandard Cmos Features Cmos Setup screenIDE Primary Master / Slave IDE Secondary Master / Slave Base Memory VideoHalt on Extended MemoryHard Disk Attributes Award Hard Disk Type TableCPU L1 & L2 Cache Advanced Bios FeaturesBios Features Setup Screen Boot UP Floppy Seek Quick Power on SELF-TESTFIRST/SECOND/BOOT Device Boot UP Numlock StatusSecurity Option Advanced Chipset Features Chipset Features Setup ScreenVideo Bios Cacheable Dram RAS# to CAS# DelaySystem Bios Cacheable Dram Timeing SelectablePCI SERR# NMI Integrated Peripherals Setup ScreenIntegrated Peripherals Primary Master/Slave PIO Secondary Master/Slave PIO VIA Onchip IDE DeviceOnChip Primary PCI IDE Primary Master/Slave Udma Secondary Master/Slave UdmaOnboard Device Super IO Device Onboard Serial Port Power Management SetupPower Management Setup Screen Acpi Function Power ManagementResume by Alarm SOFT-OFF by PWR-BTTNReset Configuration Data PNP/PCI ConfigurationPNP/PCI Configuration Setup Screen Resource Controlled byIRQ Resources IRQ-n Assigned toCurrent CPU Temperature PC Health Status Setup ScreenShutdown Temperature PC Health StatusAuto Detect PCI CLK Frequency Control Setup ScreenFrequency Control Spread SpectrumLoad FAIL-SAFE Defaults Load Optimized DefaultsTo Disable the Password Password SettingTo SET a Password Save & Exit Setup Exit Without Saving System Assembly Exploded Diagram for CF Card Hook Exploded Diagram for Fanless Back Cover Exploded Diagram for System Power Assembly Exploded Diagram for I/O Port Assembly Exploded Diagram for Motherboard Exploded Diagram for LCD Assembly Exploded Diagram for System Cable Exploded Diagram for System Inverter Board Exploded Diagram for Touch Panel Exploded Diagram for Front Panel Exploded Diagram for System I/O Side Exploded Diagram for Heatsink Exploded Diagram for Hard Disk Drive Exploded Diagram for Hard Disk Drive Holder Exploded Diagram for Power Holder Technical Summary Block Diagram Interrupt MAP IRQ AssignmentRTC Standard RAM Bank Code AssignmentDMA Channel Map Assignment Timer & DMA Channels MAPTimer Channel Map Assignment Memory MAP LPC SIOAddress Read Target Write Target Internal Unit FERR# /IGNNE#B-8