GE IC697VAL348 user manual Control Register Data Format and Definitions

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Example: The analog output for a digital input of 0A00H would be:

1.0A00H decimal equivalent is 2560

2.Analog out = -10 V + ((2560) __20__) 65,536

=-9.21875

Table 3-4. Control Register Data Format and Definitions

D15

Not

Used

D14

Control and Status Register

D13 D12 D11 D10

Not

Used

D09

D08

D07

D06

Control and Status Register

D05 D04 D03 D02

Not Used

D01

D00

Bit D15:

Not used.

Bit D14:

A low state turns the Fail LED ON. A high state turns the Fail LED OFF.

 

At power-up this control bit is low.

Bit D13:

A high state enables the selected analog output to pass out the P2 connector

 

on test bus 2 (AOTESTBS). At power-up this control bit is low.

Bit D12:

A high state enables the selected analog output to pass out the P2 connector

 

on test bus 1 (AINTESTBS). At power-up this control bit is low.

Bit D11(1):

When written high, it engages one analog output from the DAC to one of

 

two test buses. Used in conjunction with D12 and D13 to determine which

 

test bus is selected. At power-up this control bit is low which disengages

 

the test buses.

Bit D10:

Not used.

Bit D09:

Program Control Start Convert. When set to a "one", it generates a signal

 

that transfers contents of previously loaded DACs to the second rank

 

register and updates the analog output.

Bit D08:

Don’t care

Bits 07 through 00:

Not used.

(1)Channel selection for muxing one of the outputs to either test bus is achieved by writing the CSR data to the data address + 10H. See “Test Mode Programming” on page 3-7 for additional information.

3-4

IC697VAL348 8-Channel, 16-bit Digital-to-Analog Converter Board User’s Manual

GFK-2059

 

– December 2001

 

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Contents GE Fanuc Automation Cimstar As Used in this PublicationContents Reference Material and Other GE Fanuc Manuals Introduction, Description, and SpecificationsGeneral Description Functional Description Ground the System Safety SummaryConfiguration and Installation Do not install or remove boards while power is applied Physical InstallationJumper Function Preset Condition ConfigurationDigital-to-Analog Converter Board Installation Before Applying Power ChecklistRead this Direction OFF, Open = ON, Closed = Board Address Selection SwitchesAddress Modifier Address Modifier Response Selection JA Offset Binary TWO’S Complement Code Digital Code SelectionProgram Controlled and External Start Convert Mode Connector Descriptions Rear View of Board PC Board Row C Signal Mnemonic P2 ConnectorPin Number Row a Signal Mnemonic Row B Signal MnemonicPC Board Row B Signal Mnemonic Row C P3 ConnectorChannel Offest Pot P3 ConnectorDAC Zero Offset and Gain Calibration Digital-to-Analog Converter Board Calibration TableSide Programming D15 MSB D00 LSB 1Control and Status RegisterDAC Channels Address Map DAC Channels 0 to 7 Address Write OnlyDigital-to-Analog Converter Board Programming Options Immediate DAC Update ModeControl Register Data Format and Definitions D09 D08 Delayed DAC Update Mode Test Mode Programming Program Example Delayed DAC Update Mode END Analog Output Control in Immediate DAC Update Mode Analog Out PathwayControl Word D15 to D0 Hex Value DAC Programming Sequence Delayed DAC Update Mode Analog Output Control in Delayed DAC Update Mode Theory of Operation Operational Overview Immediate DAC Update Mode Program Control Update Mode Digital-to-Analog Converter Board Functional Block Diagram VMEbus Interface Description A01 A02 A03 A04 VMEbus Interface Logic and Interface Signals DIG GND Maintenance