SUPER MICRO Computer H8DII+-F, H8DI3+-F user manual Uncompressed Initialization Codes

Page 75

Appendix B: BIOS POST Checkpoint Codes

B-3 Uncompressed Initialization Codes

The following runtime checkpoint codes are listed in order of execution. These codes are uncompressed in F0000h shadow RAM.

Checkpoint

Code Description

 

 

03h

The NMI is disabled. Next, checking for a soft reset or a power on condition.

 

 

05h

The BIOS stack has been built. Next, disabling cache memory.

 

 

06h

Uncompressing the POST code next.

 

 

07h

Next, initializing the CPU and the CPU data area.

 

 

08h

The CMOS checksum calculation is done next.

 

 

0Ah

The CMOS checksum calculation is done. Initializing the CMOS status register for date and

 

time next.

 

 

0Bh

The CMOS status register is initialized. Next, performing any required initialization before the

 

keyboard BAT command is issued.

 

 

0Ch

The keyboard controller input buffer is free. Next, issuing the BAT command to the keyboard

 

controller.

 

 

0Eh

The keyboard controller BAT command result has been verified. Next, performing any

 

necessary initialization after the keyboard controller BAT command test.

 

 

0Fh

The initialization after the keyboard controller BAT command test is done. The keyboard

 

command byte is written next.

 

 

10h

The keyboard controller command byte is written. Next, issuing the Pin 23 and 24 blocking and

 

unblocking command.

 

 

11h

Next, checking if <End or <Ins> keys were pressed during power on. Initializing CMOS RAM

 

if the Initialize CMOS RAM in every boot AMIBIOS POST option was set in AMIBCP or the

 

<End> key was pressed.

 

 

12h

Next, disabling DMA controllers 1 and 2 and interrupt controllers 1 and 2.

 

 

13h

The video display has been disabled. Port B has been initialized. Next, initializing the chipset.

 

 

14h

The 8254 timer test will begin next.

 

 

19h

Next, programming the flash ROM.

 

 

1Ah

The memory refresh line is toggling. Checking the 15 second on/off time next.

 

 

2Bh

Passing control to the video ROM to perform any required configuration before the video ROM

 

test.

 

 

2Ch

All necessary processing before passing control to the video ROM is done. Looking for the

 

video ROM next and passing control to it.

 

 

2Dh

The video ROM has returned control to BIOS POST. Performing any required processing after

 

the video ROM had control

 

 

23h

Reading the 8042 input port and disabling the MEGAKEY Green PC feature next. Making the

 

BIOS code segment writable and performing any necessary configuration before initializing the

 

interrupt vectors.

 

 

24h

The configuration required before interrupt vector initialization has completed. Interrupt vector

 

initialization is about to begin.

 

 

25h

Interrupt vector initialization is done. Clearing the password if the POST DIAG switch is on.

 

 

27h

Any initialization before setting video mode will be done next.

 

 

28h

Initialization before setting the video mode is complete. Configuring the monochrome mode and

 

color mode settings next.

 

 

2Ah

Bus initialization system, static, output devices will be done next, if present. See the last page

 

for additional information.

 

 

 

 

B-3

Image 75
Contents Super Page H8DI3+-F About This ManualManual Organization Table of Contents Sgpio Bios Viii Overview ChecklistAsia-Pacific Contacting SupermicroHeadquarters EuropeH8DI3+/I+-F Serverboard Image SLOT1 SLOT2 H8DI3+/I+-F Serverboard Quick Reference Jumper Description Default SettingCOM1/COM2 Connector DescriptionExpansion Slots Serverboard FeaturesMemory ChipsetOther Acpi FeaturesDimensions Onboard I/OSR5690 HyperTransport Technology Chipset OverviewPC Health Monitoring AMD SR5690/SP5100 ProcessorPower Configuration Settings Power Supply Wake-On-LAN WOLWake-On-Ring Header WOR Super I/O H8DI3+/I+-F Serverboard User’s Manual Installation Triangles Processor and Heatsink InstallationInstalling the Heatsinks Mounting the Serverboard onto the Tray in the Chassis Mounting the Serverboard into a ChassisTo Remove To InstallSupport Maximum MemoryPCI Expansion Cards Installing a PCI Expansion CardI/O Port and Control Panel Connections Front Control PanelRear I/O Ports Reset Connector Connector DefinitionsPower Connectors Pwon ConnectorPower On LED NMI ButtonLAN1/2 Ethernet Ports Serial Ports Universal Serial Bus PortsUSB Headers Fan HeadersOverheat LED Power I2CSMBus Header Wake-On-LANButton Power LED/SpeakerChassis Intrusion ATX PS/2 Keyboard and PS/2 Mouse PortsExplanation of Jumpers Jumper SettingsCompact Flash Card PWR Connector Compact Flash Card PWR ConnectorPCI-X Slot Frequency Selection Watch Dog Enable/DisableVGA Enable/Disable I2C to PCI-Express SlotCompact Flash Master/Slave Select LAN1/2 Enable/DisableSAS Enable/Disable SAS RAID Mode SelectDedicated Ipmi LAN LEDs Onboard IndicatorsPower LED LAN1/LAN2 LEDsIDE Connectors IDE Drive Connector Pin Definitions IDE#1Floppy, SAS and Sata Drive Connections Floppy Drive Connector Sata PortsSAS Ports Installing the OS/SATA Driver Enabling Sata RAIDSerial ATA Sata Enabling Sata RAID in the Bios Installing the RAID Driver During OS Installation Using the Adaptec RAID UtilityDriver/Tool Installation Display Screen Installing DriversSupero Doctor Supero Doctor III Interface Display Screen Remote Control Troubleshooting Procedures Before Power OnNo Power Memory Errors Losing the System’s Setup ConfigurationNo Video Question What type of memory does my serverboard support? Technical Support ProceduresFrequently Asked Questions Question How do I update my BIOS?Question Whats on the CD that came with my serverboard? Returning Merchandise for ServiceIntroduction Starting the Setup UtilityAdvanced Settings Menu Boot FeatureMain Menu Processor & Clock Options Memory Configuration Advanced Chipset Control NorthBridge ConfigurationECC Configuration Dram BG Scrub Dram ECC EnableBit ECC Mode Dram Scrub RedirectDram Timing Configuration SouthBridge ConfigurationPCI Express Configuration RD890 ConfigurationHot Plug Support NB-SB Port Features NB-SB Link ApsmGPP Core Settings Powerdown Unused LanesHyper Transport Configuration Primary/Secondary/Third/Fourth IDE Master/Slave Channel IDE/Floppy ConfigurationA.R.T PIO ModeDMA Mode Block Multi-Sector TransferPCI/PnP Configuration Super IO Device Configuration Remote Access Configuration Hardware Health Configuration System Fan MonitorAcpi Configuration Ipmi Configuration View BMC System Event Log Set LAN ConfigurationIP Address Source Gateway Address Event Log ConfigurationIP Address Subnet MaskSecurity Menu Boot MenuExit Menu Beep Code Error Message Description Amibios Error Beep Codes H8DI3+/I+-F Serverboard User’s Manual Checkpoint Code Description Uncompressed Initialization CodesBootblock Recovery Codes Uncompressed Initialization Codes To test memory next Appendix B Bios Post Checkpoint Codes H8DI3+/I+-F Serverboard User’s Manual