SUPER MICRO Computer H8DII+-F, H8DI3+-F user manual Appendix B Bios Post Checkpoint Codes

Page 77

 

Appendix B: BIOS POST Checkpoint Codes

 

 

 

 

 

 

Checkpoint

Code Description

 

 

54h

Shutdown was successful. The CPU is in real mode. Disabling the Gate A20 line, parity, and

 

the NMI next.

 

 

57h

The A20 address line, parity, and the NMI are disabled. Adjusting the memory size depending

 

on relocation and shadowing next.

 

 

58h

The memory size was adjusted for relocation and shadowing. Clearing the Hit <DEL> message

 

next.

 

 

59h

The Hit <DEL> message is cleared. The <WAIT...> message is displayed. Starting the DMA

 

and interrupt controller test next.

 

 

60h

The DMA page register test passed. Performing the DMA Controller 1 base register test next.

 

 

62h

The DMA controller 1 base register test passed. Performing the DMA controller 2 base register

 

test next.

 

 

65h

The DMA controller 2 base register test passed. Programming DMA controllers 1 and 2 next.

 

 

66h

Completed programming DMA controllers 1 and 2. Initializing the 8259 interrupt controller next.

 

 

67h

Completed 8259 interrupt controller initialization.

 

 

7Fh

Extended NMI source enabling is in progress.

 

 

80h

The keyboard test has started. Clearing the output buffer and checking for stuck keys. Issuing

 

the keyboard reset command next.

 

 

81h

A keyboard reset error or stuck key was found. Issuing the keyboard controller interface test

 

command next.

 

 

82h

The keyboard controller interface test completed. Writing the command byte and initializing the

 

circular buffer next.

 

 

83h

The command byte was written and global data initialization has completed. Checking for a

 

locked key next.

 

 

84h

Locked key checking is over. Checking for a memory size mismatch with CMOS RAM data

 

next.

 

 

85h

The memory size check is done. Displaying a soft error and checking for a password or

 

bypassing WINBIOS Setup next.

 

 

86h

The password was checked. Performing any required programming before WINBIOS Setup

 

next.

 

 

87h

The programming before WINBIOS Setup has completed. Uncompressing the WINBIOS Setup

 

code and executing the AMIBIOS Setup or WINBIOS Setup utility next.

 

 

88h

Returned from WINBIOS Setup and cleared the screen. Performing any necessary

 

programming after WINBIOS Setup next.

 

 

89h

The programming after WINBIOS Setup has completed. Displaying the power on screen

 

message next.

 

 

8Ch

Programming the WINBIOS Setup options next.

 

 

8Dh

The WINBIOS Setup options are programmed. Resetting the hard disk controller next.

 

 

8Fh

The hard disk controller has been reset. Configuring the floppy drive controller next.

 

 

91h

The floppy drive controller has been configured. Configuring the hard disk drive controller next.

 

 

95h

Initializing the bus option ROMs from C800 next. See the last page of this chapter for additional

 

information.

 

 

96h

Initializing before passing control to the adaptor ROM at C800.

 

 

97h

Initialization before the C800 adaptor ROM gains control has completed. The adaptor ROM

 

check is next.

 

 

98h

The adaptor ROM had control and has now returned control to BIOS POST. Performing any

 

required processing after the option ROM returned control.

 

 

 

 

B-5

Image 77
Contents Super Page H8DI3+-F About This ManualManual Organization Table of Contents Sgpio Bios Viii Overview ChecklistHeadquarters Contacting SupermicroEurope Asia-PacificH8DI3+/I+-F Serverboard Image SLOT1 SLOT2 H8DI3+/I+-F Serverboard Quick Reference Jumper Description Default SettingCOM1/COM2 Connector DescriptionMemory Serverboard FeaturesChipset Expansion SlotsDimensions Acpi FeaturesOnboard I/O OtherSR5690 PC Health Monitoring Chipset OverviewAMD SR5690/SP5100 Processor HyperTransport TechnologyPower Configuration Settings Wake-On-Ring Header WOR Power SupplyWake-On-LAN WOL Super I/O H8DI3+/I+-F Serverboard User’s Manual Installation Triangles Processor and Heatsink InstallationInstalling the Heatsinks Mounting the Serverboard onto the Tray in the Chassis Mounting the Serverboard into a ChassisSupport To InstallMaximum Memory To RemovePCI Expansion Cards Installing a PCI Expansion CardRear I/O Ports I/O Port and Control Panel ConnectionsFront Control Panel Power Connectors Connector DefinitionsPwon Connector Reset ConnectorLAN1/2 Ethernet Ports Power On LEDNMI Button USB Headers Universal Serial Bus PortsFan Headers Serial PortsSMBus Header Power I2CWake-On-LAN Overheat LEDChassis Intrusion Power LED/SpeakerATX PS/2 Keyboard and PS/2 Mouse Ports ButtonCompact Flash Card PWR Connector Jumper SettingsCompact Flash Card PWR Connector Explanation of JumpersVGA Enable/Disable Watch Dog Enable/DisableI2C to PCI-Express Slot PCI-X Slot Frequency SelectionSAS Enable/Disable LAN1/2 Enable/DisableSAS RAID Mode Select Compact Flash Master/Slave SelectPower LED Onboard IndicatorsLAN1/LAN2 LEDs Dedicated Ipmi LAN LEDsFloppy, SAS and Sata Drive Connections IDE ConnectorsIDE Drive Connector Pin Definitions IDE#1 SAS Ports Floppy Drive ConnectorSata Ports Serial ATA Sata Installing the OS/SATA DriverEnabling Sata RAID Enabling Sata RAID in the Bios Installing the RAID Driver During OS Installation Using the Adaptec RAID UtilityDriver/Tool Installation Display Screen Installing DriversSupero Doctor Supero Doctor III Interface Display Screen Remote Control No Power Troubleshooting ProceduresBefore Power On No Video Memory ErrorsLosing the System’s Setup Configuration Frequently Asked Questions Technical Support ProceduresQuestion How do I update my BIOS? Question What type of memory does my serverboard support?Question Whats on the CD that came with my serverboard? Returning Merchandise for ServiceIntroduction Starting the Setup UtilityMain Menu Advanced Settings MenuBoot Feature Processor & Clock Options Memory Configuration Advanced Chipset Control NorthBridge ConfigurationECC Configuration Bit ECC Mode Dram ECC EnableDram Scrub Redirect Dram BG ScrubDram Timing Configuration SouthBridge ConfigurationPCI Express Configuration RD890 ConfigurationGPP Core Settings NB-SB Port Features NB-SB Link ApsmPowerdown Unused Lanes Hot Plug SupportHyper Transport Configuration Primary/Secondary/Third/Fourth IDE Master/Slave Channel IDE/Floppy ConfigurationDMA Mode PIO ModeBlock Multi-Sector Transfer A.R.TPCI/PnP Configuration Super IO Device Configuration Remote Access Configuration Acpi Configuration Hardware Health ConfigurationSystem Fan Monitor IP Address Source Ipmi Configuration View BMC System Event LogSet LAN Configuration IP Address Event Log ConfigurationSubnet Mask Gateway AddressSecurity Menu Boot MenuExit Menu Beep Code Error Message Description Amibios Error Beep CodesH8DI3+/I+-F Serverboard User’s Manual Checkpoint Code Description Uncompressed Initialization Codes Bootblock Recovery Codes Uncompressed Initialization Codes To test memory next Appendix B Bios Post Checkpoint Codes H8DI3+/I+-F Serverboard User’s Manual