Maxim MAX9777 manual MAX9778 HPS Setting, Inputs Mode Gain Path Hpsen HPS

Page 13

Stereo 3W Audio Power Amplifiers with Headphone Drive and Input Mux

Table 1b. MAX9778 HPS Setting

INPUTS

 

MODE

GAIN PATH*

 

 

 

HPS_EN

 

HPS

 

 

 

 

 

 

 

 

0

 

X

BTL

A or B

 

 

 

 

 

1

 

0

BTL

A or B

 

 

 

 

 

1

 

1

SE

A or B

*Note:

A or B—Gain path selected by external GAINAB

Headphone Sense Input (HPS)

With headphone sense enabled, a voltage on HPS less than 0.7 x VDD sets the device to speaker mode. A volt- age greater than 0.9 x VDD disables the inverting bridge amplifier (OUT_-), which mutes the speaker amplifier and sets the device into headphone mode.

For automatic headphone detection, enable headphone sense and connect HPS to the control pin of a 3-wire headphone jack as shown in Figure 2. With no head- phone present, the resistive voltage-divider created by R1 and R2 sets the voltage on HPS to be less than 0.7 x VDD, setting the device to speaker mode and the gain setting defaults to GAINA (MAX9777). When a head- phone plug is inserted into the jack, the control pin is dis- connected from the tip contact, and HPS is pulled to VDD through R1, setting the device into headphone mode and the gain-setting defaults to GAINB (MAX9777) (see the Gain Select section). Place a resistor in series with the control pin and HPS (R3) to prevent any audio signal from coupling into HPS when the device is in speaker mode.

 

 

VDD

MAX9777/MAX9778

 

 

R1

MAX9777

R3

680kΩ

 

MAX9778

47kΩ

 

HPS

 

 

OUTL+

 

 

OUTR+

 

 

 

R2

R2

 

10kΩ

10kΩ

Figure 2. HPS Configuration Circuit

 

device. The digital section of the MAX9777 remains

active when the device is shut down through the inter-

face. All devices feature a logic-low on the SHDN input.

 

MUTE

The MAX9777/MAX9778 feature a mute mode. When the device is muted, the input is disconnected from the amplifiers. MUTE does not shut down the device.

MAX9777 MUTE The MAX9777 MUTE mode is selected by writing to the MUTE register (see the Mute Register section). The left and right channels can be independently muted.

MAX9778 MUTE The MAX9778 features an active-high MUTE input that mutes all channels.

Shutdown

The MAX9777/MAX9778 feature a 10µA, low-power shutdown mode that reduces quiescent current con- sumption and extends battery life. The drive amplifiers and bias circuitry are disabled, the amplifier outputs (OUT_) go high impedance, and BIAS is driven to GND. Driving SHDN low places the devices into shut- down mode, disables the interface, and resets the I2C registers to a default state. A logic-high on SHDN enables the devices.

MAX9777 Software Shutdown A logic-high on bit 0 of the SHDN register places the MAX9777 in shutdown mode. A logic-low enables the

Click-and-Pop Suppression

The MAX9777/MAX9778 feature Maxim’s comprehen- sive click-and-pop suppression. When entering or exit- ing shutdown, the common-mode bias voltage of the amplifiers is slowly ramped to and from the DC bias point using an S-shaped waveform. In headphone mode, this waveform shapes the frequency spectrum, minimizing the amount of audible components present at the headphone. In speaker mode, the BTL amplifiers start up in the same fashion as in headphone mode. When entering shutdown, both amplifier outputs ramp to GND quickly and simultaneously. To maximize click- and-pop suppression, drive SHDN to 0V before power- up or power-down transitions.

______________________________________________________________________________________ 13

Image 13
Contents MAX9778ETI+ Part Control PIN PKG Interface Package Code MAX9777ETI+Output Amplifiers Speaker MODE, HPS = GND Parameter Symbol Conditions MIN TYP MAX UnitsDigital Inputs MUTE, SHDN, HPSEN, GAINA/B, IN1/2 Bias Voltage BiasHeadphone Sense Input HPS Timing Characteristics MAX9777 Total Harmonic Distortion Plus Noise Typical Operating CharacteristicsMAX9777/MAX9778 Entering Shutdown Speaker Mode RL = 32Ω Headphone Mode Power PIN Name Function Pin DescriptionInputs Gain Mode Hpsd SPKR/HP HPS Path BIT Headphone Sense EnableDetailed Description Input MultiplexerInputs Mode Gain Path Hpsen HPS MAX9778 HPS SettingDigital Interface Wire Serial-Interface Timing DiagramADD Connection 2C Address Early Stop ConditionAddress BIT Name Value Description RegisterRegister Address BIT Name Value DescriptionMAX9777 Control Register Format Applications Information Power Dissipation and Heat SinkingBTL Speaker Amplifiers Single-Ended Headphone AmplifierReducing Cout by Adding Rseries Component SelectionLayout and Grounding Gain SelectMAX9777 Typical Application CircuitsMAX9778 Pvdd Functional DiagramsPV DD Thin QFN Pin ConfigurationsPackage Information MAX9777/MAX9778