Maxim MAX9778 manual MAX9777 Control Register Format

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Stereo 3W Audio Power Amplifiers with Headphone Drive and Input Mux

Table 5. MAX9777 Control Register Format

REGISTER ADDRESS

 

0000 0011

 

 

 

 

BIT

NAME

VALUE

DESCRIPTION

 

 

 

 

7

X

Don’t Care

 

 

 

 

6

X

Don’t Care

 

 

 

 

5

X

Don’t Care

 

 

0*

Speaker mode selected

4

SPKR/HP

 

 

1

Headphone mode

 

 

selected

 

 

 

 

 

 

 

3

GAINA/B

0*

Gain-setting A selected

 

 

1

Gain-setting B selected

 

 

 

 

 

 

 

 

0*

Automatic headphone

 

 

detection enabled

 

 

 

2

HPS_D

 

 

 

Automatic headphone

 

 

1

detection disabled

 

 

 

(HPS ignored)

 

 

 

 

1

IN1/IN2

0*

Input 1 selected

1

Input 2 selected

 

 

 

 

 

 

0

X

Don’t Care

*Default

Read Data Format

In read mode (R/W = 1), the MAX9777 writes the con- tents of the selected register to the bus. The direction of the data flow reverses following the address acknowl- edge by the MAX9777. The master device reads the contents of all registers, including the read-only status register. Table 6 shows the status register format.

Interrupt Output (INT)

The MAX9777 includes an interrupt output (INT) that can indicate to a master device that an event has occurred. INT is triggered when the state of HPS changes. During normal operation, INT idles high. If a headphone is inserted/removed from the jack and that action is detected by HPS, INT pulls the line low. INT remains low until a read data operation is executed.

I2C Compatibility

The MAX9777 is compatible with existing I2C systems. SCL and SDA are high-impedance inputs; SDA has an open drain that pulls the data line low during the ninth clock pulse. The communication protocol supports the standard I2C 8-bit communications. The general call address is ignored. The MAX9777 slave addresses are compatible with the 7-bit I2C addressing protocol only.

MAX9777/MAX9778

Table 6. MAX9777 Status Register Format

REGISTER ADDRESS

 

0000 0000

 

 

 

 

BIT

NAME

VALUE

DESCRIPTION

7

THRM

0

Device temperature below thermal limit

1

Device temperature exceeding thermal limit

 

 

6

AMPR-

0

OUTR- current below current limit

1

OUTR- current exceeding current limit

 

 

 

 

 

 

5

AMPR+

0

OUTR+ current below current limit

 

 

1

OUTR+ current exceeding current limit

 

 

 

 

 

 

4

AMPL-

0

OUTL- current below current limit

1

OUTL- current exceeding current limit

 

 

 

 

 

 

3

AMPL+

0

OUTL+ current below current limit

1

OUTL+ current exceeding current limit

 

 

 

 

 

 

2

HPSTS

0

Device in speaker mode

 

 

1

Device in headphone mode

 

 

1

X

Don’t Care

 

 

 

 

0

X

Don’t Care

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Contents MAX9778ETI+ Part Control PIN PKG Interface Package Code MAX9777ETI+Output Amplifiers Speaker MODE, HPS = GND Parameter Symbol Conditions MIN TYP MAX UnitsHeadphone Sense Input HPS Bias Voltage BiasDigital Inputs MUTE, SHDN, HPSEN, GAINA/B, IN1/2 Timing Characteristics MAX9777 Total Harmonic Distortion Plus Noise Typical Operating CharacteristicsMAX9777/MAX9778 Entering Shutdown Speaker Mode RL = 32Ω Headphone Mode Power PIN Name Function Pin DescriptionInputs Gain Mode Hpsd SPKR/HP HPS Path BIT Headphone Sense EnableDetailed Description Input MultiplexerInputs Mode Gain Path Hpsen HPS MAX9778 HPS SettingDigital Interface Wire Serial-Interface Timing DiagramADD Connection 2C Address Early Stop ConditionAddress BIT Name Value Description RegisterRegister Address BIT Name Value DescriptionMAX9777 Control Register Format Applications Information Power Dissipation and Heat SinkingBTL Speaker Amplifiers Single-Ended Headphone AmplifierReducing Cout by Adding Rseries Component SelectionLayout and Grounding Gain SelectMAX9777 Typical Application CircuitsMAX9778 Pvdd Functional DiagramsPV DD Thin QFN Pin ConfigurationsPackage Information MAX9777/MAX9778