Sony MZ-B10 service manual Uosci, Uosco, SI3, SO3, SCK3, Msin, Msck, Sak, Xcas, Xras

Page 50

MZ-B10

Pin No.

Pin Name

I/O

 

 

 

 

 

Description

 

 

 

 

 

 

 

 

 

166

WK_DET

I

Set key WAKE detection signal input

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

167

NC

I

Not used (fixed at “H”)

 

 

 

 

 

 

 

 

 

 

 

 

168

HALF_LOCK_SW

I

Open button detection switch input (A/D input) “L” : the open button is pressed

 

 

 

 

 

 

169

RMC_KEY

I

Key input (A/D input) from the remote commander

 

 

 

 

 

 

 

 

 

170

JOG_PUSH

I

Jog dial push detection signal input

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

171

REC_KEY

I

REC key input (A/D input)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

172

END_SEARCH

I

END SEARCH key input (A/D input)

Not used (open)

 

 

 

 

 

 

 

 

173

RADIO_ON

I

RADIO ON detection signal input

Not used (connected to the ground)

 

 

 

 

 

 

174

RMC_DTCK

I/O

TSB master data clock input/output or SSB data input/output

 

 

 

 

 

 

 

 

 

175

UDP

I/O

USB data (+) input terminal

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

176

UDM

I/O

USB data (-) input terminal

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

177

SUSPEND

O

USB suspend signal output

Not used (open)

 

 

 

 

 

 

 

 

178

UPUEN

O

USB pull-up resistor connection control output terminal

Not used (open)

 

 

 

 

 

179

UOSCI

I

Resonator (48MHz) connection terminal for the USB oscillation circuit

Not used (connected to the ground)

 

 

 

 

 

180

UOSCO

O

Resonator (48MHz) connection terminal for the USB oscillation circuit

Not used (open)

 

 

 

 

 

 

 

 

 

181

SI3

I

Not used (connected to the ground)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

182

SO3

O

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

183

SCK3

I/O

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

184

MSIN

I

Not used (connected to the ground)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

185

MSOUT

O

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

186

MSCK

I/O

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

187

NC

O

Power supply control signal output to the RF amplifier

Not used (open)

 

 

 

 

 

 

188

NC

O

Power supply control signal output to the liquid crystal display module

Not used (open)

 

 

 

 

 

 

 

189

SP_AMP

O

Built-in speaker control signal output

“H”: activate

 

 

 

 

 

 

 

 

 

 

190

XHP_DET

I

Headphone jack detection signal input

 

 

 

 

 

 

 

 

 

 

 

191

SET_CODE0

I

Input terminal for the set (open in this set)

 

 

 

 

 

 

 

 

 

 

192

SET_CODE1

I

Input terminal for the set (fixed at “L” in this set)

 

 

 

 

 

 

 

 

 

 

193

SET_CODE2

I

Input terminal for the set (open in this set)

 

 

 

 

 

 

 

 

 

 

194

SET_CODE3

I

Input terminal for the set (open in this set)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

195, 196

NC

O

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

197

NC

I

USB power supply voltage detection terminal 2

Not used (open)

 

 

 

 

 

 

 

 

 

198

NC

O

LG DCR control signal output

Not used (open)

 

 

 

 

 

 

 

199

MUTE

O

Analog muting control signal output to the headphone amplifier “H”: muting ON

 

 

 

 

 

 

 

 

 

 

 

 

200

KAHODEN_DET

O

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

201

CS_RTC

O

Chip select signal output to the real time clock Not used (open)

 

 

 

 

 

202 to 204

MODE1 to 3

O

Power supply control signal output for the over write head to the REC driver

 

 

 

 

 

 

205, 206

HD_CON_1, 2

O

Over write head control signal output to the REC driver

 

 

 

 

 

 

 

 

 

 

 

 

 

 

207

TAT

I

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

208

TAN

I

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

209

NAR

I

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

210

IDO

I

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

211

SAK

O

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

212

XRST

I

System reset signal input from the power control

“L”: reset

 

 

 

 

 

 

213

TRST

I

Terminal for the test mode setting (normally fixed at “L”)

 

 

 

 

 

 

 

214, 215

TEST0, 1

I

Input terminal for the main test (normally fixed at “L”)

 

 

 

 

 

 

 

 

 

 

216 to 231

D0 to 15

—

DRAM data0 to 15 terminal

Not used (open)

 

 

 

 

 

 

 

 

 

 

232 to 245

A00 to 13

—

DRAM address0 to 13 terminal

Not used (open)

 

 

 

 

 

 

 

 

 

 

246

XCAS

—

DRAM CAS terminal

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

247

XRAS

—

DRAM RAS terminal

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

248

XWE

—

DRAM write enable terminal

 

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

50

Page 49 Page 51
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Page 49 Page 51
Contents MZ-B10 877-031-03LP2 LP4 Mono Battery lifeFlexible Circuit Board Repairing LP2Table of Contents Section Servicing Notes Main Board Side BSection General Looking at the controls MZ-B10Section Disassembly Disassembly FlowCase Lower Assy Speaker AssyMain Board Electret Condenser Microphone MIC901Set Chassis Assy, Case Spk Assy Case Upper AssyLCD Module Rec Button AssyMechanism Deck MT-MZN710-177 Gear SA, OP Service Assy LCX-5R Gear SA Screw M1.4Holder Assy DC Motor Sled M602Gear HA Operation in Setting the Test Mode Section Test ModeSetting Method of Test Mode Releasing the Test ModeTransition Method in Manual Mode Configuration of Test ModeManual Mode 081A1B C68S1B063B1B 000F1BSetting Method of Reset the Error Display Code Reset the Error Display CodeDescription of Error Indication Codes Description of Indication History000 EIB Stat Adrs BEmp**000 ######000 BOvr Bful Rtry Sound Skip Check Result Display Mode000 888ResOK? ResetResNV CC ResV2 num 863 V1 num 861V1 dat 862 V2 dat 864VC2 Lo 743 VC1 H 742VC2 Hi 744 REG1 745REG3L2 748 REG3L1 747REG3 H 749 751752 Adjustment Method of Vrecmiddle X4 speed item numberAdjustment Method of Vrechigh Head Motor item number 753Adjustment/checking and Connection Location Assy 000 Power Supply Adjustment Auto Item FeedConfiguration of power supply adjustment auto item feed SetTmp 015WrPwHi 9E Laser Power CheckLaser HrefPwOverall Adjustment error message Overall Adjustment Mode Title DisplayAdjustment Method of CD and MO Overall Adjustment Mode Assy11 000CD and MO Overall Adjustment Items CD overall adjustment itemsResClr 043 Resume 043Res 043 PatClr 022Patch 023 2A152B9800 SCC 023Address value Adjusted value Patch data list2AFC 2ABF2AFB 2ADB345 Section Diagrams Block DiagramWaveforms Lead LayoutsPrinted Wiring Board Main Board Side a Uses unleaded solder Semiconductor LocationPrinted Wiring Board Main Board Side B Uses unleaded solder SemiconductorTP1607 TP1602 TP1608 TP1609 Schematic Diagram Main Board 2/4 See page 36 for Waveforms Ver 1.2DTE306KCXJA ND730GA NEL02TPLI1 02RETPINL2 ETDPPT803OT 229C IC Block Diagrams IC302 TA2131FLELIC601 XPC18A22AEPR2 IC701 SC111258EPR2 IC901 SC901580EPR2 IC Pin Function Description Sens LrckExcs FmckFfclr GndswVlon XcsnvSI3 UosciUosco SO3DVSS1 XCSDVSS0 DVSS2FVDD0 FVSS0Lower Case Section SectionExploded Views Upper Chassis Section 112 108 Chassis Section 101105 107 104 102 103 106 110Mechanism Deck MT-MZN710-177//M 301 302 308 306 303307 304 305309 310 311358 Mechanism Deck MT-MZN710-177//M 357 356 355354 353 352 351 359 361 360 364Semiconductors Main Electrical Parts ListResistors Main SN761058AZQLR RES-CHIP Short Chip Variable Resistor Memo Revision History
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