Fujitsu MB15F74UV manual Power Saving Mode Intermittent Mode Control Circuit, Status PS pin

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MB15F74UV

3. Power Saving Mode (Intermittent Mode Control Circuit)

Status

PS pin

 

 

Normal mode

H

 

 

Power saving mode

L

 

 

The intermittent mode control circuit reduces the PLL power consumption.

By setting the PS pin low, the device enters into the power saving mode, reducing the current consumption. See the Electrical Characteristics chart for the specific value.

The phase detector output, Do, becomes high impedance.

For the dual PLL, the lock detector, LD, is as shown in the LD Output Logic table.

Setting the PS pin high, releases the power saving mode, and the device works normally.

The intermittent mode control circuit also ensures a smooth startup when the device returns to normal operation. When the PLL is returned to normal operation, the phase comparator output signal is unpredictable. This is because of the unknown relationship between the comparison frequency (fp) and the reference frequency (fr) which can cause a major change in the comparaor output, resulting in a VCO frequency jump and an increase in lockup time.

To prevent a major VCO frequency jump, the intermittent mode control circuit limits the magnitude of the error signal from the phase detector when it returns to normal operation.

Notes : • When power (VCC) is first applied, the device must be in standby mode.

•PS pin must be set “L” at Power-ON.

OFF

VCC

Clock

Data

LE

PS

ON

tV ≥ 1 ∝s

tPS ≥ 100 ns

(1)

(2)

(3)

(1)PS = L (power saving mode) at Power-ON

(2)Set serial data at least 1 ∝s after the power supply becomes stable (VCC ≥ 2.2 V) .

(3)Release power saving mode (PSIF, PSRF : “L” → “H”) at least 100 ns later after setting serial data.

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Contents Pin plastic BCC LCC-18P-M05 FeaturesDescription PackagePIN Assignments MB15F74UVPin no Descriptions PIN DescriptionMB15F74UV Block DiagramRecommended Operating Conditions Parameter Symbol Rating Unit MinParameter Symbol Value Unit Remarks Min Typ Absolute Maximum RatingsMin Typ Electrical CharacteristicsParameter Symbol Condition −40 C ≤ Ta ≤ 85 C Parameter Symbol Condition Value Unit Min TypCharge pump Vs V do V ≤ V do ≤ V CC − 0.5 Current rate Vs TaR10 R11 R12 R13 R14 Functional DescriptionProgrammable Programmable Reference CounterDivide ratio Data settingDivide ratio R14 R13 R12 R11 R10 Divide ratio N11 N10LD/fout pin state Phase comparator input FC IF, RF = Do IF, Do RFDivide ratio SW = Current valueStatus PS pin Power Saving Mode Intermittent Mode Control Circuit100 Parameter Min Typ Max UnitIF-PLL section RF-PLL section LD output Phase Comparator Output WaveformFC bit = LD Output LogicOscilloscope Controller Divide ratio settingRF-PLL input sensitivity vs. Input frequency Typical CharacteristicsCatalog guaranteed range Fin input sensitivityInput Oscin input sensitivityInput sensitivity vs. Input frequency SensitivityCharge pump output voltage VDO MA mode Charge pump output current IDO mAFinRF input impedance Fin input impedanceFinIF input impedance Oscin input impedance Oscin input impedancePLL Reference Leakage PLL Phase NoiseReference Information Mkr x 439.99764 ∝s 50.0009 MHz Controller Application ExamplePart number Package Remarks Usage PrecautionsOrdering Information Fujitsu Limited C18058S-c-1-1 Dimensions in mm inches Package DimensionF0401 Fujitsu Limited
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