Fujitsu MB15F74UV manual Data setting, Divide ratio R14 R13 R12 R11 R10, Divide ratio N11 N10

Page 9

MB15F74UV

• Programmable Counter

(LSB)Data Flow (MSB)

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

CN1

CN2

LDS

SWIF/

FCIF/

A1

A2

A3

A4

A5

A6

A7

N1

N2

N3

N4

N5

N6

N7

N8

N9

N10

N11

SWRF

FCRF

A1 to A7

: Divide ratio setting bits for the swallow counter (0 to 127)

N1 to N11

: Divide ratio setting bits for the programmable counter (3 to 2,047)

LDS

: LD/fout signal select bit

SWIF/SWRF

: Divide ratio setting bit for the prescaler (IF : SWIF, RF : SWRF)

FCIF/FCRF

: Phase control bit for the phase detector (IF : FCIF, RF : FCRF)

CN1, CN2

: Control bit

Note : Data input with MSB first.

(2)Data setting

•Binary 14-bit Programmable Reference Counter Data Setting

Divide ratio	R14	R13	R12	R11	R10	R9	R8	R7	R6	R5	R4	R3	R2	R1

3	0	0	0	0	0	0	0	0	0	0	0	0	1	1

4	0	0	0	0	0	0	0	0	0	0	0	1	0	0
•	•	•	•	•	•	•	•	•	•	•	•	•	•	•
•	•	•	•	•	•	•	•	•	•	•	•	•	•	•
•	•	•	•	•	•	•	•	•	•	•	•	•	•	•
16383	1	1	1	1	1	1	1	1	1	1	1	1	1	1

Note : Divide ratio less than 3 is prohibited.

•Binary 11-bit Programmable Counter Data Setting

Divide ratio	N11	N10	N9	N8	N7	N6	N5	N4	N3	N2	N1

3	0	0	0	0	0	0	0	0	0	1	1

4	0	0	0	0	0	0	0	0	1	0	0
•	•	•	•	•	•	•	•	•	•	•	•
•	•	•	•	•	•	•	•	•	•	•	•
•	•	•	•	•	•	•	•	•	•	•	•
2047	1	1	1	1	1	1	1	1	1	1	1

Note : Divide ratio less than 3 is prohibited

•Binary 7-bit Swallow Counter Data Setting

Divide ratio	A7	A6	A5	A4	A3	A2	A1

0	0	0	0	0	0	0	0

1	0	0	0	0	0	0	1
•	•	•	•	•	•	•	•
•	•	•	•	•	•	•	•
•	•	•	•	•	•	•	•
127	1	1	1	1	1	1	1

9

Image 9

Contents Description FeaturesPackage Pin plastic BCC LCC-18P-M05PIN Assignments MB15F74UVPin no Descriptions PIN DescriptionMB15F74UV Block DiagramParameter Symbol Value Unit Remarks Min Typ Parameter Symbol Rating Unit MinAbsolute Maximum Ratings Recommended Operating ConditionsElectrical Characteristics Parameter Symbol ConditionMin Typ Charge pump Vs V do Parameter Symbol Condition Value Unit Min TypV ≤ V do ≤ V CC − 0.5 Current rate Vs Ta −40 C ≤ Ta ≤ 85 CProgrammable Functional DescriptionProgrammable Reference Counter R10 R11 R12 R13 R14Divide ratio R14 R13 R12 R11 R10 Data settingDivide ratio N11 N10 Divide ratioDivide ratio SW = Phase comparator input FC IF, RF = Do IF, Do RFCurrent value LD/fout pin stateStatus PS pin Power Saving Mode Intermittent Mode Control Circuit100 Parameter Min Typ Max UnitFC bit = Phase Comparator Output WaveformLD Output Logic IF-PLL section RF-PLL section LD outputOscilloscope Controller Divide ratio settingCatalog guaranteed range Typical CharacteristicsFin input sensitivity RF-PLL input sensitivity vs. Input frequencyInput sensitivity vs. Input frequency Oscin input sensitivitySensitivity InputCharge pump output voltage VDO MA mode Charge pump output current IDO mAFin input impedance FinIF input impedanceFinRF input impedance Oscin input impedance Oscin input impedancePLL Phase Noise Reference InformationPLL Reference Leakage Mkr x 439.99764 ∝s 50.0009 MHz Controller Application ExampleUsage Precautions Ordering InformationPart number Package Remarks Fujitsu Limited C18058S-c-1-1 Dimensions in mm inches Package DimensionF0401 Fujitsu Limited