Sony NW-MS6 service manual Section Diagrams, Block Diagram Main Section

SECTION 5

DIAGRAMS

5-1. BLOCK DIAGRAM – MAIN Section –

NW-MS6

		DSP, MAGIC GATE CORE,
CN6000	MEMORY STICK INTERFACE,
MEMORY STICK		USB INTERFACE
		IC8000
4	22	DIO
MS DIO			–DB0DB15	44,–3947 – 52, 56,–54 58
MS INS	26	INS
8	21	SCLK
MS SCLK
2	20	BS
MS BS
6

VCC	3
	9
VCC		B+ SWITCH		VDDIO2	ADR14	65,66,	–7377
		Q6000, 6001
					ADR0–	63,–59	71,–69
	CN6002
	(USB)
DATA+	3			28	UDP
	2
				30	UDM
DATA–
				USB
				SWITCH	IRQ	85
	VBUS			Q6003, 6004
			+3.3V	25	DP2
VBUS	1			29	AVD2
			REGULATOR
	D6000		IC6000
(Page 16)	DP3
A				102	DP3
B	SAM RST			13	RST
(Page 16)				EEPROM
				IC6002

		DI	3		92	SIOSO
		DO	4		91	SIOSI
		XSK	2		95	SIOCK
		XCS	1		93	SIOCS
	RDY/XBUSY		7		17	DP0
		RESET	6		18	DP1
					9	XTAL1
				X8000
				12MHz
					10	EXTAL1
					3	EXTAL0
	DEMULTIPLEXER
	IC5800
		Y0		12
14	A	Y1		11	78	RD
13	B	Y2		10
		Y3		9
		G
15
		Y0		4
2	A	Y1		5	82	CS
3	B	Y2		6		WRU WRL
		Y3		7		80 81
		G

D0 – D15

A1 – A15

IC7700

D/A CONVERTER

HEADPHONE AMP

122

IC3100

IC3200

253 – 246

D15

MS PWR

PCMO 198

4

SDATA

SERIAL

8X

∆∑

V OUTL

IN B

POWER

OUTB

+

R-CH

J3301

i

D0 – D15

BCK 204

3

BICK

INPUT

INTERPOLATOR

MODULATOR

LPF

14

21

AMP

4

256,

D0 –

LRCK

INTERFACE

BEEP OUTB

LRCK 205

5

R-CH

R-CH

7 – 1,

23

BASS

FS256 197

1

MCLK

CLOCK DIVIDER

DE – EMPHASIS

BOOST

BEEP

VREF 13

REFERENCE

CONTROL

BST SW

MT SW

PW SW

VOLTAGE SWITCH

XPD

LPF2

BEEP

IN

Q3301

IN

8

2

16

9

15

17 18

DATABUS

A1 – A18

28 – 20, 1810–

A1 – A18

DEM

BUS

BASS BOOST

CONTROL

Q3302

ADDRESS

125 SAM INT

68 WAKE2

88

83

86

62

51 123

87 85

CS0 ROM RY/XBY

DAC DEMP

DAC XPD

HPBB ON

HPBB1, 2

PWM2 HP BEEP XTI

HP MUTE

HP PWR

LB UB CS1

SYSTEM CONTROLLER

SDI1

SDO1

SCK1

RTC CS

XTO

WE OE

IC7001 (1/2)

49 112 45 44 47 46 48

72 78 79 60

151

150

3

4

2

7

X7001

SO

SI

SCLK

CE

22.5792MHz

REAL TIME

OUT

37,

47

CLOCK

IN

CE

6

IC1001

40,

38,

OSC

OSC

RY/BY

17

D0 – D15

21, 24, 32, 29,

22, 23, 30, 39,

DQ0 – DQ14,

DQ15/A-1

WE 25

9

8

OE

7

X1001

16,

15,

32.768kHz

13,

14,

FLASH

9, 34, 33,

MEMORY

– 45, 10

IC5000

A1 – A18

2, 12, 11,

42, 41, 43,

A0 – A17

RESET

26

XRST2

C

3, 1,

36,

(Page 16)

42, 35, 43, 36 – 38, 46,5 –

47, 2, 3, 11 – 14, 6, 735,

XBLE

1

D0 – D15

XBLH 10

DATABUS

ADDRESSBUS

I/O0I/O15–

XWE 39

XOE

9

18,33,25,17,26, 19, 27, 28, 16, 23,40,32,24,31, 22, 30, 29	A0– A16
	S-RAM
	IC5600

1

XOE CS1 XWE

	A1 – A17			• R-ch is omitted due to same as L-ch.
				• SIGNAL PATH
A18				: PLAY
				: Check-out
	34 XCE			: Check-in
		XWE	XOE	CS1

15 15