Xilinx UG078 manual Virtex-4 LX/SX Prototype Platform

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4	www.xilinx.com	Virtex-4 LX/SX Prototype Platform
		UG078 (v1.2) May 24, 2006

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Contents Virtex-4 LX/SX Prototype Platform UG078 v1.2 May 24Revision History Date Version RevisionTable of Contents Virtex-4 LX/SX Prototype Platform Guide Contents Additional ResourcesConventions TypographicalPreface About This Guide Online DocumentMeaning or Use Example CD-ROM Contents Package ContentsIntroduction Features IntroductionVirtex-4 LX/SX Prototype Platform Block Diagram Detailed Description Power SwitchDetailed Description Power Supply Jacks Power Enable JumpersConfiguration Ports Serial ModeJtag Chain Jtag Termination Jumper6a. Upstream System ACE Interface Connector 6b. Downstream System ACE Interface Connector6c. Upstream Interface Connector Upstream Interface Connector 44-Pin FemaleVCCO-Enable Supply Jumpers 6d. Downstream Interface ConnectorPrototyping Area Oscillator Sockets Clock Name Pin NumberDifferential Clock Inputs SMA Clock Pin Connections for SF363 and FF668Clock Name SMA Clock Pin Connections for FF1148 and FF1513DUT Socket Pin BreakoutBreakout User LEDs Active-High FF668Reset Switch Active-Low Program SwitchPlatform Flash Isprom