Xilinx UG078 manual 6c. Upstream Interface Connector, Upstream Interface Connector 44-Pin Female

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Detailed Description

6c. Upstream Interface Connector

The upstream interface connector, as shown in Figure 6, is used to configure the DUT in select map or slave-serial mode. This connector can be sourced by a downstream interface connector of another prototype platform board.

GND

GND

GND

GND

NC

NC

NC

GND

NC

NC

NC

TMS

TDI

TDO

TCK

NC

NC

NC DOUT_BUSY INIT PROG RW_B

A22

A21

A20

A19

A18

A17

A16

A15

A14

A13

A12

A11

A10

A9

A8

A7

A6

A5

A4

A3

A2

A1

B22

B21

B20

B19

B18

B17

B16

B15

B14

B13

B12

B11

B10

B9

B8

B7

B6

B5

B4

B3

B2

B1

GND

GND

GND

NC

AFX_M2

AFX_M1

AFX_M0

NC

NC

NC

CS_B

DIN

D1

D2

D3

D4

D5

D6

D7

DONE

CCLK

NC

UG027_06_051004

Figure 6: Upstream Interface Connector (44-Pin Female)

Virtex-4 LX/SX Prototype Platform

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UG078 (v1.2) May 24, 2006

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Contents UG078 v1.2 May 24 Virtex-4 LX/SX Prototype PlatformDate Version Revision Revision HistoryTable of Contents Virtex-4 LX/SX Prototype Platform Typographical Guide ContentsAdditional Resources ConventionsOnline Document Preface About This GuideMeaning or Use Example Package Contents CD-ROM ContentsIntroduction Introduction FeaturesVirtex-4 LX/SX Prototype Platform Block Diagram Power Switch Detailed DescriptionDetailed Description Power Enable Jumpers Power Supply JacksSerial Mode Configuration PortsJtag Termination Jumper Jtag Chain6b. Downstream System ACE Interface Connector 6a. Upstream System ACE Interface ConnectorUpstream Interface Connector 44-Pin Female 6c. Upstream Interface Connector6d. Downstream Interface Connector VCCO-Enable Supply JumpersPrototyping Area Clock Name Pin Number Oscillator SocketsSMA Clock Pin Connections for FF1148 and FF1513 Differential Clock InputsSMA Clock Pin Connections for SF363 and FF668 Clock NamePin Breakout DUT SocketBreakout FF668 User LEDs Active-HighProgram Switch Reset Switch Active-LowPlatform Flash Isprom