Major Chips Description 2-27

Table 2-2 82371AB Pin Descriptions (continued)

Name Type Description
CONFIG2 I CONFIGURATION SELECT 2. This input signal is used to select the positive or
subtractive decode of FFFF0000h–FFFFFFFFh memory address range (top
64 Kbytes). If CONFIG[2]=0, the PIIX4 will positively decode this range. If
CONFIG[2]=1, the PIIX4 will decode this range with subtractive decode timings
only. The input value of this pin must be static and may not dynamically
change during system operations.
PWROK I POWER OK. When asserted, PWROK is an indication to PIIX4 that power and
PCICLK have been stable for at least 1 ms. PWROK can be driven
asynchronously. When PWROK is negated, PIIX4 asserts CPURST, PCIRST#
and RSTDRV. When PWROK driven active (high), PIIX4 negates CPURST,
PCIRST#, and RSTDRV.
SPKR O SPEAKER. The SPKR signal is the output of counter timer 2 and is internally
“ANDed” with Port 061h bit 1 to provide the Speaker Data Enable. This signal
drives an external speaker driver device, which in turn drives the ISA system
speaker.
During Reset: Low After Reset: Low During POS: Last State
TEST# I TEST MODE SELECT. The test signal is used to select various test modes of
PIIX4. This signal must be pulled up to V CC(SUS) for normal operation.
POWER AND GROUND PINS
VCC V CORE VOLTAGE SUPPLY. These pins are the primary voltage supply for the
PIIX4 core and IO periphery and must be tied to 3.3V.
VCC (RTC) V RTC WELL VOLTAGE SUPPLY. This pin is the supply voltage for the RTC
logic and must be tied to 3.3V.
VCC (SUS) V SUSPEND WELL VOLTAGE SUPPLY. These pins are the primary voltage
supply for the PIIX4 suspend logic and IO signals and must be tied to 3.3V.
VCC (USB) V USB VOLTAGE SUPPLY. This pin is the supply voltage for the USB
input/output buffers and must be tied to 3.3V.
VREF V VOLTAGE REFERENCE. This pin is used to provide a 5V reference voltage
for 5V safe input buffers. VREF must be tied to 5V in a system requiring 5V
tolerance. In a 5V tolerant system, this signal must power up before or
simultaneous to VCC. It must power down after or simultaneous to VCC. In a
non-5V tolerant system (3.3V only), this signal can be tied directly to VCC.
There are then no sequencing requirements.
VSS V CORE GROUND. These pins are the primary ground for PIIX4.
VSS (USB) V USB GROUND. This pin is the ground for the USB input/output buffers.