Appendix A | System Settings and Pin Assignments | 24 | |
A.1 | System I/O Address and Interrupt Assignment | 24 | |
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| Table A.1: | 24 |
A.2 | Board Connectors and Jumpers | 26 | |
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| Figure A.1: Connector & Jumper Locations (front) | 26 |
A.3 | 27 | ||
A.4 | 28 | ||
A.5 | Power Connector (PWR) | 28 | |
A.6 | PS/2 Keyboard and Mouse Connector | 29 | |
A.7 | USB Connector | 29 | |
A.8 | VGA Display Connector | 30 | |
A.9 | LVDS and LVDS_PWR | 31 | |
| A.9.1 | LVDS | 31 |
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| Table A.10:LVDS pin definitions | 31 |
| A.9.2 LVDS Power Setting (CN17) | 32 | |
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| Table A.11:CN17 Configuration | 32 |
| A.9.3 | LVDS_PWR (Backlight Control) | 32 |
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| Table A.12:LVDS_PWR pin definition | 32 |
A.10 | Clear CMOS (CN3) | 33 | |
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| Table A.13:CN3 Clear CMOS | 33 |
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