Performance Guidelines for AMD Athlon™ 64 and AMD Opteron™ | 40555 Rev. 3.00 June 2006 |
ccNUMA Multiprocessor Systems |
|
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
T im e for w rite
1 4 9 %
1 27 % 12 9%
113 %
0 Ho p | 1 Ho p | 1 Ho p 2 Ho p |
|
|
|
0 .0 .w .0 0 .0 .w .1 0 .0 .w .2 0 .0 .w .3
Figure 5.
In this test case, a write access is similar to a read access as far as the coherent HyperTransport™ link traffic or the memory traffic generated, except for certain key differences. A write access brings data into the cache much like a read and then modifies it in the cache. However, in this particular synthetic test case, there are several successive write accesses to sequential cache line elements in a
2.98GB/s. Not only do writes take longer than reads for any given hop distance, but they slow down more quickly with hop distance as a result.
3.2.1Keeping Data Local by Virtue of first Touch
In order to keep data local, it is recommended that the following principles be observed.
As long as a thread initializes the data it needs (writes to it for the first time) and does not rely on any other thread to perform the initialization, a
the thread runs. This policy of keeping data local by writing to it for the first time is known as the local allocation policy by virtue of first touch. This is the default policy used by a
OS.
A
22 | Analysis and Recommendations | Chapter 3 |