AMD D900K manual Power Controller, Sheet 30

POWER CONTROLLER 1

Schematic Diagrams

	VDD3
VDD5	(13,14,16,18,23,24,26,27,32)
VDD3	(3,11,12,14,16,18,21,24,26,31,32,33,34,35)
+12V	(14,18,25,26,28,32,34)	R649
		47K

(31) +1.2VLDT_PG
C	Q17

		B
E			C
	2N3904
			E

R650

+1.2VLDT

+1.2VLDT

47K

(3,8,33) +1.2VLDT

R647

VDD3

R669

10K

VDD3

4.7K

Q16

R668

0(R)

C326

B

1.2VLDT_PG

(24) PS_ON

U29

1.2VLDT_PG(33)

SUSBG

R667

0

Z37241

5

0.1U

C908

(31)

SUSBG

IN

VCC

2N3904

2.5VDDA_PGD

2

0.22U(R)

IN

3

4

SUSB#

GND

OUT

SUSB#

(14,17,21,24,32)

74AHC1G08

	VDD3
			U21A
	VCORE_PWRGD	14
(31,33) VCORE_PWRGD		1
	SUSBG	3
(31) SUSBG		2
		7		74HC08

D36	1N4148
C	A
R648	1M	EN_+1.2VLDT	EN_+1.2VLDT(33)
	D04	C906		VDD3					VDD3
		0.47U		14	U26A				14	U26B
			2.5VDDA_PG	1	2	Z3711R666	0		Z37223	4	2.5VDDA_PGD
		VDD3		7				C912	7
					74LVC14			0.1U(R)		74LVC14

Sheet 30 of 40

POWER

CONTROLLER 1

B.Schematic

S1 ON S3 OFF						C285
VDDA_EN High: Enable Low :disable						0.1U
	VCORE_PWRGD	1	U15
			IN	VCC	5
		2
			IN

		VDD3			3	GND	OUT	4	EN_2.5VDDA
									+2.5VDDA
				C286		TC7S32F
									(3,33) +2.5VDDA
		5	U16	0.1U
(31)	SUSBG	2		4	RUN_MODE				EN_2.5VDDA(33)
		1
(31,34)	DUAL_PG
		3							C284
			TC7SZ08						0.1U(R)

+2.5VDDA

R25

15K

	VDD3
C305	ENABLE VCORE POWER	VDD3
0.1U		C907

14U21B

			RUN_MODE							U23			0.1U
						4		Z3533	1			5
				Z3528		5	6			IN	VCC
									2
	VDD3					7	74HC08			IN
									3			4	EN_VCORE (33)
			U21C							GND	OUT
		14								TC7S32F
(31,34) DUAL_PG		9	8
	2.5VDDA_PG 10
					(31) +1.2VLDT_PG
		7
			74HC08

B

Q3

DTC114EUA

E C

VDD3

	R222
R211	47K
4.7K
C	2.5VDDA_PG (31)
B	Q13
E	2N3904

	VDD3
	U21D
	14
T	12
	11

13T

T 7

74HC08

Diagrams

POWER CONTROLLER 1 B - 31