Analog Devices AD8342 specifications AC Interfaces, Input 50 Ω 100 Ω 500 Ω Matched Network Shunt

AC INTERFACES

The AD8342 is designed to downconvert radio frequencies (RF) to lower intermediate frequencies (IF) using a high or low-side local oscillator (LO). The LO is injected into the mixer core at a frequency higher or lower than the desired input RF. The difference between the LO and the RF , fLO − fRF, (high side) or fRF − fLO (low side) is the intermediate frequency, fIF. In addition to the desired RF signal, an RF image is downconverted to the desired IF frequency. The image frequency is at fLO + fIF when driven with a high side LO . When using a broadband load, the conversion gain of the AD8342 is nearly constant over the specified RF input band (see Figure 3).

The AD8342 is designed to operate over a broad frequency range. It is essential to ac-couple RF and LO ports to prevent dc offsets from skewing the mixer core in an asymmetrical man- ner, potentially degrading noise figure and linearity.

The RF input of the AD8342 is high impedance, 1 kΩ across the frequency range shown in Figure 41. The input capacitance decreases with frequency due to package parasitics.

2.00		1.00
1.75
1.50		0.75
1.25			CAPACITANCE(pF)
RESISTANCE(kΩ)		0.50
1.00
0.75
0.50		0.25
0.25
0	100M 200M 300M 400M 500M 600M 700M 800M 900M	0	05352-042
0		1G
	FREQUENCY (Hz)

Figure 41. RF Input Impedance

The matching or termination used at the RF input of the AD8342 has a direct effect on its dynamic range. The charac- terization circuit, as well as the evaluation board, uses a 100 Ω resistor to terminate the RF port. This termination resistor in shunt with the input stage results in a return loss of better than −10 dBm (relative to 50 Ω). Table 4 shows gain, IP3, P1dB, and noise figure for four different input networks. This data was measured at an RF frequency of 250 MHz and at an LO frequency of 300 MHz.

AD8342

Table 4. Dynamic Performance for Various Input Networks

Input	50 Ω	100 Ω	500 Ω	Matched
Network	Shunt	Shunt	Shunt	(Fig. 40)
Gain (dB)	0.66	3.5	5.3	9.3
IIP3 (dBm)	25.4	22.9	20. 6	18.5
P1dB (dBm)	10.8	8.4	6.3	2.3
NF (dB)	14	12.5	10.2	10.5

The RF port can also be matched using an LC circuit, as shown in Figure 42.

50Ω 100nH (1000 + j0) Ω

			ZO = 50Ω
3.6pF	1kΩ	ZL	f	MAIN	= 250MHz
					043
					05352-

Figure 42. Matching Circuit

Impedance transformations of greater than 10:1 result in a higher Q circuit and thus a narrow RF input bandwidth. A 1 kΩ resistor is placed across the RF input of the device in parallel with the device internal input impedance, creating a 500 Ω load. This impedance is matched to as close as possible to 50 Ω for the source, with standard components using a shunt C, series L matching circuit (see Figure 43).

50.0
25.0	100.0
Q = 3.0
		200.0
10.0
			500.0
4		2	1
		500.0
		200.0
		100.0
	50.0	3
	25.0
	10.0		05352-044

Point 1(1000.0 + j0.0)Ω Q = 0.0 at 250.000 MHz

Point 2(500.0 + j0.0)Ω Q = 0.0 at 250.000 MHz

Point 3(55.6 − j157.2)Ω Q = 2.8 at 250.000 MHz

Point 4(55.6 − j0.1)Ω Q = 0.0 at 250.000 MHz

Figure 43. LC Matching Example

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