BIXOLON service manual SRP-350/352plusA&C, DIP Switch Circuit

SRP-350/352plusA&C

4-3-8 DIP Switch Circuit

The key board circuit consist of the scan signal of 3 lines and the return signal of 2-line. The CPU sends repeatedly and continuously the scan data DIP_A~DIP. The DIP S/W information input in the return signal if the specific DIP S/W is ON status during the given time. The CPU reads the data through DIP IN1~IN2 and analyzes what DIP S/W is ON and performs the selected function.

1

3

5

7

9

11

13

15

0

1

3

5

7

9

11

13

15

0

		+3.3V				+3.3V			BP47
									100nF
RA9	10K1/16W	5 6 7 8 5 6 7 8	RA10	10K1/16W		16	U14			0
SW1		4 3 2 1 4 3 2 1					74HC151/SOIC
2				4					11	R62	100F
					D1	VCC		B				DIP_B
4				3	D0			A	10	R63	100F	DIP_A
6				2	D2			C	9	R64	100F	DIP_C
8				1
					D3
10				15
					D4
12				14					5			DIP_IN1
					D5			Y
14				13					6
					D6			W
16				12
					D7
							STROBE
218-008LPS					GND				7
					8
						0				0
												CPU
		+3.3V				+3.3V			BP48			uPD70F3107
									100nF
RA11	10K1/16W	5 6 7 8 8 7 6 5	RA12	10K1/16W		16	U15			0
SW2		4 3 2 1 1 2 3 4					74HC151/SOIC
2				4					11
					D1	VCC		B
4				3	D0			A	10
6				2	D2			C	9
8				1
					D3
10				15
					D4
12				14					5			DIP_IN2
					D5			Y
14				13					6
					D6			W
16				12
					D7
218-008LPS					GND		STROBE		7

8

0 0

DIP_A

DIP_B

DIP_C

DIP1 DIP2 DIP3 DIP4 DIP5 DIP6 DIP7 DIP8

[Figure 4-12 USB Communication Block Diagram]

Rev. 2.01 - 39 -