13 Pulse Control Register (0E) This read/write register configures the operating mode of the pulse. See Figure 9 for details.
0E Pulse Control Register
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Write Not Used DOU RUN TMD DEL FRE Mode
Read Not Used DOU RUN TMD DEL FRE Mode
DOU Double Pulse Control (0 = single pulse, 1 = double pulse)
RUN Run Enable/Disable (1 = enabled)
TMD Trigger Mode (0 = triggered , 1 = gated)
DEL Delay Mode (0 = immediate (no delay), 1 = delayed)
FRE Free Running Mode (0 = triggered, 1 = free running)
Mode Waveform Mode bit 1 0
0 0 Normal
0 1 Square Wave
1 0 20 MHz Square Wave
1 1 40 MHz Square Wave
NOTES:
1) With double pulse enabled the primary pulse will s tart 75 nsec after trigger out. The
second pulse will start the programmed delay time after trigger out. Double pulse
enable has precedence over delayed pulse.
2) Pulse streams are generated when RUN is high, however, the output relay must be
enabled to output to t he front panel.
3) With the trigger mode set to gated, the output pulse stream will continue as long as the
TRIG IN is hi gh. When the TRIG IN goes low, the pul se sequence started will finis h
then stop.
4) With delayed pulse enabled, the primary pulse will start the programmed delay time
after trigger out. Double pulse enable has precedence over delayed pulse.
5) Free run disables all trigger inputs and produces a continuous pulse stream.
6) In the square wave mode, the squ are wave period is equal to two times the PRI period
programmed.
7) The special m odes provide t he ability t o output a 20 or 40 MHz squa re wave by
programming only the waveform mode.
Figure 9. Control Register