2-3
Cisco ASR 9000 Series Aggregation Services Router Overview and Reference Guide
OL-17501-09
Chapter 2 Functional Description
Router Operation

Figure 2-3 Major System Components and Interconnections in the Cisco ASR 9000 Series Routers

RSP 0
Fabric
Chip
Fabric
Interface
Chip
System
Timing
GE
Switch
CPU
VOQ
Scheduler
40x1GE
Line Card
FPGA
Fabric
Interface
Chip
10 x
SFP
10 x
SFP
FPGA
10 x
SFP
NPU NPU NPU NPU
10 x
SFP
CPU
8x10GE 2:1
Oversubscribed
Line Card
FPGA
Fabric
Interface
Chip
FPGA
CPU
4x10GE
Line Card
FPGA
Fabric
Interface
Chip
FPGA
GE PHYGE PHYGE PHY
CPU
RSP 1
Backplane
Backplane
Fabric
Chip
Fabric
Interface
Chip
System
Timing
GE
Switch
CPU
VOQ
Scheduler
Data Plane
Control Plane
10
GE
X
F
P
10
GE
X
F
P
10
GE
X
F
P
10
GE
X
F
P
10
GE
X
F
P
10
GE
X
F
P
10
GE
X
F
P
10
GE
X
F
P
10
GE
X
F
P
10
GE
X
F
P
10
GE
X
F
P
10
GE
X
F
P
247272
8x10GE 80G
Line Rate Card
GE
PHY
Fabric
Interface
Chip
FPGA
NPU
10
GE
X
F
P
NPU
10
GE
X
F
P
NPU
10
GE
X
F
P
NPU
10
GE
X
F
P
Fabric
Interface
Chip
FPGA
NPU
10
GE
X
F
P
NPU
10
GE
X
F
P
NPU
10
GE
X
F
P
NPU
10
GE
X
F
P
CPU
GE
SW
To
FPGAs
To
NPUs
2x10GE + 20x1GE
Combo Line Card
FPGAFPGA
NPU
10x
S
F
P
NPU
10x
S
F
P
NPU
10
GE
X
F
P
NPU
10
GE
X
F
P
GE
PHY
CPU
GE
SW
To
FPGAs
To
NPUs
Fabric
Interface
Chip
NPU NPU NPU NPU NPU NPU NPU NPU