Compaq SMA200 Lvdsddcclk Lvdsddcdat, Lvdsclk + Lvdsvdden Lvdsbklctl Lvdsbklen Lvdsctlaclk

DIGITAL-LOGIC AG SMA200 Manual V1.0

5.4.3.LVDS

Signal

BUS

Type Description

On Module	Ext. Ter-
Termination	mination
	Needed

Max.

Length Ohm in mm

Matched Length in mm

LVDS_DDCCLK	LVDS
LVDS_DDCDAT	LVDS
LVDS_DATA[0..3] +/-	LVDS
LVDS_CLK +/-	LVDS
LVDS_VDDEN	LVDS
LVDS_BKLCTL	LVDS

LVDS_BKLEN	LVDS
LVDS_CTLA_CLK	LVDS

LVDS_CTLB_DATA LVDS

3.3V	DDC signal	PU 10k to	-	150	55
		3.3V
3.3V	DDC signal	PU 10k to	-	150	55
		3.3V
Dif	LVDS data signal	-	-	150	100
Out	Connected directly to the
	display.
Dif	LVDS clock signal	-	-	150	100
Out	Connected directly to the
	display.
3.3V	LVDS control signal	100k pull	-	150	55
Out	To switch on/off the VDD	down
	of the LVDS display.
3.3V	Connected to the LVDS		-	150	55
Out	display’s PWM-based
	backlight inverter
	module. No multi-bus
	master mode is
	supported.
3.3V	Connected to the LVDS	100k pull	-	150	55
Out	display’s backlight	down
	inverter module switch.
3.3V	Connected to the LVDS	PU 4.7k to	-	150	55
I/O	display’s PWM-based	3.3V
	backlight inverter
	module. No multi bus
	master mode supported.
3.3V	Connected to the LVDS	PU 4.7k to	-	150	55
I/O	display’s PWM-based	3.3V
	backlight inverter
	module.

0.5

0.5

If the signals are not used:

All these LVDS signals may be left open.

Remarks:

For the DDC signals, a voltage translator to 3.3V or 5V is needed.

Pair to Pair spacing:	35mil = 0.9mm
Pair to Pair matching:	better than 25mm
Bus to Bus spacing:	20mil = 0.5mm
Maximum via count:	0 2.
EMV/EMI filters:

27