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Cypress Write Cycle No. 2 WE Controlled, OE HIGH During Write15, CY62128B MoBL, + Feedback

Models: CY62128B

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Write Cycle No. 2 (WE Controlled, OE HIGH During Write)[15, 16]

CY62128B

MoBL®

Switching Waveforms (continued)

Write Cycle No. 2 (WE Controlled, OE HIGH During Write)[15, 16]

		tWC
ADDRESS
		tSCE
CE1
CE2
		tSCE
	tAW		tHA
	tSA	tPWE
WE
OE
		tSD	t
			HD
DATA I/O	NOTE 17	DATAINVALID
	tHZOE

Write Cycle No.3 (WE Controlled, OE LOW)[15, 16]

		tWC
ADDRESS
	tSCE
CE1
CE2	tSCE
	tSCE
	tAW		tHA
	tSA	tPWE
WE
		tSD	tHD
DATAI/O	NOTE 17	DATA VALID
	tHZWE		tLZWE
Note:

17. During this period the I/Os are in the output state and input signals should not be applied.

Document #: 38-05300 Rev. *C

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Cypress CY62128B manual Write Cycle No. 2 WE Controlled, OE HIGH During Write15, Write Cycle No.3 WE Controlled, OE LOW15

Contents

CMOS for optimum speed/power Low active power FeaturesLogic Block Diagram Temperature Ranges Commercial 0C to 70C Industrial -40C to 85CPin Definitions Pin ConfigurationsPower Dissipation Product PortfolioOperating Range Electrical Characteristics Over the Operating RangeTemperature T Maximum RatingsData Retention Waveform Thermal Resistance6Capacitance6 AC Test Loads and Waveforms62128B-70 Switching Characteristics7 Over the Operating RangeSwitching Waveforms 62128B-55CY62128B MoBL Switching Waveforms continuedRead Cycle No. 2 OE Controlled13 Write Cycle No. 1 CE1 or CE2 Controlled15CY62128B MoBL Write Cycle No. 2 WE Controlled, OE HIGH During Write15Write Cycle No.3 WE Controlled, OE LOW15 Switching Waveforms continuedTruth Table PowerCY62128B MoBLCY62128B MoBL Package Diagrams32-Lead 450 MIL Molded SOIC S34 32-Lead Thin Small Outline Package Type I 8x20 mm Z32CY62128B MoBL Package Diagrams continued32-Lead Shrunk Thin Small Outline Package 8x13.4 mm ZA32 32-Lead Reverse Thin Small Outline Package ZR32Document Number IssueDocument History Page Document Title CY62128B MoBL 1-Mbit 128K x 8 Static RAM