Cypress manual MoBL CY62128E, 32-pin Shrunk Thin Small Outline Package 8 x 13.4 mm, Page 9 of

Models: CY62128E

1 12

Page 9

MoBL® CY62128E

51-85094-*D

Document #: 38-05485 Rev. *F

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Image 9

Contents

Logic Block Diagram FeaturesMoBL CY62128E Functional DescriptionProduct Portfolio Pin Configuration2MoBL CY62128E A7 A6 A5 A4 A3 A2 A1 A0 IO0 IO1 IO2Maximum Ratings Electrical Characteristics Over the Operating RangeOperating Range MoBL CY62128EThermal Resistance9 Data Retention Characteristics Over the Operating RangeAC Test Loads and Waveform Data Retention Waveform11MoBL CY62128E Switching Characteristics Over the Operating Range12MoBL CY62128E Switching WaveformsFigure 2. Read Cycle No. 2 OE Controlled 11, 17 Figure 3. Write Cycle No. 1 WE Controlled 11, 15, 19Switching Waveforms continued Truth TableMoBL CY62128E Ordering Information Package DiagramsMoBL CY62128E IndustrialFigure 7. 32-pin Shrunk Thin Small Outline Package 8 x 13.4 mm MoBL CY62128EPage 9 of + FeedbackFigure 8. 32-pin Thin Small Outline Package Type I 8 x 20 mm MoBL CY62128EPage 10 of + FeedbackMoBL CY62128E Document History PageDocument Title CY62128E MoBL 1-Mbit 128K x 8 Static RAM Document NumberPSoC Solutions Sales, Solutions, and Legal InformationWorldwide Sales and Design Support Products