Cypress CY62138CV30, CY62138CV33 Switching Waveforms continued, Truth Table, CY62138FV30 MoBL

Models: CY62138CV25 CY62138CV30 CY62138FV30 CY62138CV33

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CY62138FV30 MoBL®

Write Cycle No. 2 (CE1 or CE2 controlled) [10, 14, 18, 19]

Write Cycle No. 3 (WE controlled, OE LOW) [10, 19]

Document #: 001-08029 Rev. *E

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[+] Feedback

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Contents

Functional Description FeaturesLogic Block Diagram CY62138FV30 MoBLProduct Portfolio Pin ConfigurationCY62138FV30 MoBL CY62138FV30 MoBL Electrical Characteristics Over the Operating RangeMaximum Ratings TemperatureData Retention Waveform Data Retention Characteristics Over the Operating RangeThermal Resistance AC Test Loads and WaveformsCY62138FV30 MoBL Write Cycle No. 1 WE controlled 10, 14, 18 Switching WaveformsCY62138FV30 MoBL Read Cycle No. 2 OE controlled 10, 16Truth Table Switching Waveforms continuedCY62138FV30 MoBL Ordering Information Package DiagramsCY62138FV30 MoBL + Feedback Package Diagrams continuedCY62138FV30 MoBL Figure 2. 32-pin TSOP IIPage 10 of Package Diagrams continuedCY62138FV30 MoBL Figure 3. 32-pin 450 Mil Molded SOICPage 11 of Package Diagrams continuedCY62138FV30 MoBL Figure 4. 32-pin TSOP I 8 x 20 mmPage 12 of Package Diagrams continuedCY62138FV30 MoBL Figure 5. 32-pin STSOP 8 x 13.4 mmDocument Title CY62138FV30 MoBL, 2-Mbit 256K x 8 Static RAM Document History PageIssue CY62138FV30 MoBL