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CY62138CV33 Package Diagrams continued, CY62138FV30 MoBL, 32-pin TSOP II, + Feedback
Models:
CY62138CV25
CY62138CV30
CY62138FV30
CY62138CV33
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Electrical Characteristics Over the Operating Range
Logic Block Diagram
Pin Configuration
Issue
Switching Waveforms
Page 9
Image 9
CY62138FV30 MoBL
®
Package Diagrams
(continued)
Figure 2.
32-pin
TSOP II,
51-85095
51-85095-**
Document #:
001-08029
Rev. *E
Page 9 of 13
[+] Feedback
Page 8
Page 10
Page 9
Image 9
Page 8
Page 10
Contents
Logic Block Diagram
Features
CY62138FV30 MoBL
Functional Description
Pin Configuration
Product Portfolio
CY62138FV30 MoBL
Maximum Ratings
Electrical Characteristics Over the Operating Range
Temperature
CY62138FV30 MoBL
Thermal Resistance
Data Retention Characteristics Over the Operating Range
AC Test Loads and Waveforms
Data Retention Waveform
CY62138FV30 MoBL
CY62138FV30 MoBL
Switching Waveforms
Read Cycle No. 2 OE controlled 10, 16
Write Cycle No. 1 WE controlled 10, 14, 18
Switching Waveforms continued
Truth Table
CY62138FV30 MoBL
Package Diagrams
Ordering Information
CY62138FV30 MoBL
CY62138FV30 MoBL
Package Diagrams continued
Figure 2. 32-pin TSOP II
+ Feedback
CY62138FV30 MoBL
Package Diagrams continued
Figure 3. 32-pin 450 Mil Molded SOIC
Page 10 of
CY62138FV30 MoBL
Package Diagrams continued
Figure 4. 32-pin TSOP I 8 x 20 mm
Page 11 of
CY62138FV30 MoBL
Package Diagrams continued
Figure 5. 32-pin STSOP 8 x 13.4 mm
Page 12 of
Issue
Document History Page
CY62138FV30 MoBL
Document Title CY62138FV30 MoBL, 2-Mbit 256K x 8 Static RAM
