Cypress CY62138FV30 manual Maximum Ratings, Electrical Characteristics Over the Operating Range

CY62138FV30 MoBL®

Maximum Ratings

Exceeding maximum ratings may impair the useful life of the device. These user guidelines are not tested.

Storage Temperature	–65°C to +150°C
Ambient Temperature with
Power Applied	55°C to +125°C
Supply Voltage to Ground
Potential	–0.3V to 3.9V
DC Voltage Applied to Outputs
in High-Z State [4, 5]	–0.3V to 3.9V

DC Input Voltage [4, 5]			–0.3V to 3.9V
Output Current into Outputs (LOW)				20 mA
Static Discharge Voltage				> 2001V
(MIL-STD-883, Method 3015)
Latch-up Current				> 200 mA
Product	Range	Ambient		VCC	[6]
		Temperature
CY62138FV30LL	Industrial	–40°C to +85°C		2.2V to 3.6V

Electrical Characteristics (Over the Operating Range)

Parameter	Description			Test Conditions				45 ns		Unit
							Min	Typ [3]	Max
VOH	Output HIGH Voltage		IOH = –0.1 mA				2.0			V
			IOH = –1.0 mA, VCC > 2.70V				2.4			V
VOL	Output LOW Voltage		IOL = 0.1 mA						0.4	V
			IOL = 2.1 mA, VCC > 2.70V						0.4	V
VIH	Input HIGH Voltage	VCC = 2.2V to 2.7V					1.8		VCC + 0.3V	V
			VCC= 2.7V to 3.6V				2.2		VCC + 0.3V	V
VIL	Input LOW Voltage	VCC = 2.2V to 2.7V				For BGA package	–0.3		0.6	V
			VCC= 2.7V to 3.6V				–0.3		0.8	V
			VCC = 2.2V to 3.6V			For other packages	–0.3		0.6	V
IIX	Input Leakage Current	GND < VI < VCC					–1		+1	∝A
IOZ	Output Leakage Current		GND < VO < VCC,				–1		+1	∝A
			output disabled
ICC	VCC Operating Supply Current	f = fmax = 1/tRC				VCC = VCCmax		13	18	mA
						IOUT = 0 mA
			f = 1 MHz					1.6	2.5
						CMOS levels
ISB1	Automatic CE Power Down			1 > VCC – 0.2V or CE2 < 0.2V,				1	5	∝A
			CE
	Current CMOS Inputs		VIN > VCC – 0.2V, VIN < 0.2V),
			f = fmax (address and data only),
			f = 0 (OE, and
					WE), VCC = 3.60V
ISB2 [7]	Automatic CE Power Down			1 > VCC – 0.2V or CE2 < 0.2V,				1	5	∝A
			CE
	Current CMOS Inputs		VIN > VCC – 0.2V or VIN < 0.2V,
			f = 0, VCC = 3.60V

Capacitance (For all packages) [8]

Parameter	Description	Test Conditions	Max	Unit
CIN	Input Capacitance	TA = 25°C, f = 1 MHz,	10	pF
		VCC = VCC(typ.)
COUT	Output Capacitance		10	pF

Notes

4.VIL(min) = –2.0V for pulse durations less than 20 ns.

5.VIH(max) = VCC+0.75V for pulse durations less than 20 ns.

6.Full device AC operation assumes a 100 ∝s ramp time from 0 to VCC(min) and 200 ∝s wait time after VCC stabilization.

7.Only chip enables (CE1 and CE2) must be at CMOS level to meet the ISB2 / ICCDR spec. Other inputs can be left floating.

8.Tested initially and after any design or process changes that may affect these parameters.

Document #: 001-08029 Rev. *E Page 3 of 13

[+] Feedback