Cypress CY62138EV30 CY62138EV30

CY62138EV30

MoBL®

Document #: 38-05577 Rev. *A Page 2 of 9

Pin Configuration[2]

Product Portfolio

Product VCC Range (V) Speed

(ns)

Power Dissipation

Operating ICC (mA)

Standby ISB2 (µA)f = 1 MHz f = fmax

Min. Typ.[3] Max. Typ.[3] Max. Typ.[3] Max. Typ.[3] Max.

CY62138EV30LL 2.2 3.0 3.6 45 2 2.5 15 20 1 7

Notes:

2. NC pins are not connected on the die.

3. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ.), TA = 25°C.

A15

VCC

A13

A12

WE A7

I/O

A11

A10

VSS

I/O

Vcc

I/O

I/O2

I/O3

A17

A16

A9A14

Top View

FBGA

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Contents

Main 2-Mbit (256K x 8) MoBL Stati c RAM CY62138EV30 Features Functional Description Logic Block Diagram CY62138EV30 Document #: 38-05577 Rev. *A Page 2 of 9 Pin Configuration Product Portfolio Product VCC Range (V) Speed (ns) CY62138EV30 Maximum Ratings Electrical Characteristics Capacitance Thermal Resistance AC Test Loads and Waveforms Data Retention Characteristics Data Retention Waveform Switching Characteristics Switching Waveforms CY62138EV30 Document #: 38-05577 Rev. *A Page 6 of 9 Read Cycle No. 2 (OE Controlled)[14, 15] Write Cycle No. 1 (WE Controlled)[16, 18] Switching Waveforms Switching Waveforms ADDRESS CE Truth Table CY62138EV30 Document #: 38-05577 Rev. *A Page 8 of 9 Ordering Information 0.26MAX. 5.25 Document History Page