
CY62138F MoBL®
AC Test Loads and Waveforms
R1
VCC ![]()
ALL INPUT PULSES
OUTPUT ![]()
30 pF ![]()
INCLUDING
JIG AND
SCOPE
  | 
  | 3.0V  | 
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  | 90%  | |||
R2  | 10%  | 
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  | GND  | 
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  | Rise Time = 1 V/ns  | 
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Equivalent to:  | THEVENIN EQUIVALENT  | |||||||||||||
OUTPUT  | 
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  | RTH  | 
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  | V  | |||||
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90%
10%
 Fall Time = 1 V/ns
Parameters | 5.0V  | Unit | 
R1  | 1800  | Ω  | 
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R2  | 990  | Ω  | 
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RTH  | 639  | Ω  | 
VTH  | 1.77  | V  | 
Data Retention Characteristics (Over the Operating Range)
Parameter | Description | 
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  | Conditions | Min | Typ [3] | Max | Unit | 
VDR  | VCC for Data Retention  | 
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  | 2.0  | 
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  | V  | 
ICCDR [7]  | Data Retention Current  | VCC= VDR, | 
  | 1  | > VCC − 0.2V or CE2 < 0.2V,  | 
  | 1  | 5  | ∝A  | 
CE  | |||||||||
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  | VIN > VCC - 0.2V or VIN < 0.2V  | 
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tCDR [8]  | Chip Deselect to Data  | 
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  | 0  | 
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  | ns  | 
  | Retention Time  | 
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tR [9]  | Operation Recovery Time  | 
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  | tRC  | 
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  | ns  | 
Data Retention Waveform [10]
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  | VCC(min)  | DATA RETENTION MODE | VCC(min)  | |
V  | CC  | V  | > 2.0V  | ||
  | tCDR  | DR  | 
  | tR  | |
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CE  | 
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Notes:
9.Full device AC operation requires linear VCC ramp from VDR to VCC(min) > 100 ∝s or stable at VCC(min) > 100 ∝s.
10.CE is the logical combination of CE1 and CE2. When CE1 is LOW and CE2 is HIGH, CE is LOW; when CE1 is HIGH or CE2 is LOW, CE is HIGH.
Document #:   | Page 4 of 10  | 
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