CY62138F MoBL®
Switching Waveforms
Read Cycle 1 (Address transition controlled) [15, 16]
tRC
ADDRESS
tAA
tOHA
DATA OUT | PREVIOUS DATA VALID |
Read Cycle No. 2 (OE controlled) [10, 16, 17]
DATA VALID
ADDRESS |
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| tRC |
|
CE |
|
|
|
| tACE |
|
|
OE |
| tHZOE |
|
| tDOE |
| |
| tHZCE |
| |
| tLZOE | HIGH | |
DATA OUT | HIGH IMPEDANCE | DATA VALID | IMPEDANCE |
|
| ||
tLZCE |
|
| |
| tPD |
| |
V | tPU | ICC | |
CC | 50% |
| 50% |
SUPPLY |
| ||
CURRENT |
|
| ISB |
Write Cycle No. 1 (WE controlled) [10, 14, 18, 19]
|
| tWC |
|
ADDRESS |
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|
|
|
| tSCE |
|
CE |
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|
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| tAW |
| tHA |
| tSA | tPWE |
|
WE |
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|
OE |
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| tSD | t |
|
|
| HD |
DATA IO | NOTE 20 | DATA VALID |
|
| tHZOE |
|
|
Notes:
15.The device is continuously selected. OE, CE1 = VIL, CE2 = VIH.
16.WE is HIGH for read cycle.
17.Address valid before or similar to CE1 transition LOW and CE2 transition HIGH.
18.Data IO is high impedance if OE = VIH.
19.If CE1 goes HIGH or CE2 goes LOW simultaneously with WE HIGH, the output remains in high impedance state.
20.During this period, the IOs are in output state. Do not apply input signals.
Document #: | Page 6 of 10 |
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