Switching Waveforms, Address | Cypress CY62146EV30 instruction

CY62146EV30 MoBL®

Switching Waveforms

Read Cycle 1 (Address Transition Controlled) [16, 17]

tRC

ADDRESS

tOHA tAA

DATA OUT

PREVIOUS DATA VALID

DATA VALID

Read Cycle No. 2 (OE Controlled) [17, 18]
ADDRESS
CE		tRC
CE
		tPD
	t	tHZCE
	ACE
OE
	tDOE	tHZOE
	tDOE
BHE/BLE	tLZOE
BHE/BLE
	tDBE	tHZBE
	tLZBE	HIGH
DATA OUT	HIGHIMPEDANCE	IMPEDANCE
DATA OUT	tLZCE	DATA VALID
	tLZCE
	tPU	ICC
VCC		ICC
VCC	50%	50%
SUPPLY		ISB
CURRENT

Notes:

16.The device is continuously selected. OE, CE = VIL, BHE and/or BLE = VIL.

17.WE is HIGH for read cycle.

18.Address valid before or similar to CE and BHE, BLE transition LOW.

Document #: 38-05567 Rev. *C

Page 6 of 12

Image 6

Cypress CY62146EV30 manual Switching Waveforms, Address, Data OUT Previous Data Valid

Contents

Features Functional DescriptionProduct Portfolio Ball Vfbga Pin Tsop Logic Block DiagramPin Configurations 3 Top View Electrical Characteristics Over the Operating Range Maximum RatingsOperating Range AC Test Loads and Waveforms Data Retention Characteristics Over the Operating RangeThermal Resistance Data Retention Waveform 45 ns Parameter Description Min Max Unit Read Cycle Write Cycle Switching Waveforms AddressData OUT Previous Data Valid Write Cycle No WE Controlled 15, 19 Write Cycle No CE Controlled 15, 19 Write Cycle No WE Controlled, OE LOW Ordering Information Inputs/Outputs Mode PowerTruth Table BHE BLE Package Diagrams Ball Vfbga 6 x 8 x 1 mm Pin Tsop II Issue Date Orig. Description of Change Document HistoryREV ECN no