CY62148E MoBL®
Switching Waveforms
Read Cycle No. 1 (Address Transition Controlled) [16, 17]
tRC
ADDRESS
tAA
tOHA
DATA OUT | PREVIOUS DATA VALID |
Read Cycle No. 2 (OE Controlled) [17, 18]
DATA VALID
ADDRESS |
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| tRC |
|
CE |
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| tACE |
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|
OE |
| tHZOE |
|
| tDOE |
| |
| tHZCE |
| |
| tLZOE | HIGH | |
DATA OUT | HIGH IMPEDANCE | DATA VALID | IMPEDANCE |
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| ||
tLZCE |
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| |
| tPD |
| |
V | tPU | ICC | |
CC | 50% |
| 50% |
SUPPLY |
| ||
CURRENT |
|
| ISB |
Write Cycle No. 1 (WE Controlled, OE HIGH During Write) [19, 20]
|
| tWC |
|
ADDRESS |
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| tSCE |
|
CE |
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| tAW |
| tHA |
| tSA | tPWE |
|
WE |
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OE |
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| tSD | t |
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| HD |
DATA IO | NOTE 21 | DATA VALID |
|
| tHZOE |
|
|
Notes:
16.Device is continuously selected. OE, CE = VIL.
17.WE is HIGH for read cycles.
18.Address valid before or similar to CE transition LOW.
19.Data IO is high impedance if OE = VIH.
20.If CE goes HIGH simultaneously with WE HIGH, the output remains in high impedance state.
21.During this period, the IOs are in output state and input signals must not be applied.
Document #: | Page 6 of 10 |
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