Cypress CY62148E Truth Table, Switching Waveforms

CY62148E MoBL®

Document #: 38-05442 Rev. *F Page 7 of 10

Write Cycle No. 2 (CE Controlled) [19, 20]

Write Cycle No. 3 (WE Controlled, OE LOW) [20]

Truth Table

CE WE OE IO’s Mode Power

H X X High Z Deselect/Power down Standby (ISB)

L H L Data Out Read Active (ICC)

L L X Data In Write Active (ICC)

L H H High Z Selected, Outputs Disabled Active (ICC)

Switching Waveforms (continued)

tWC

DATA VALID

tAW

tSA

tPWE

tHA

tHD

tSD

tSCE

ADDRESS

DATAIO

DATA VALID

tHD

tSD

tLZWE

tPWE

tSA

tHA

tAW

tSCE

tWC

tHZWE

ADDRESS

DATA IO

NOTE

[+] Feedback

Contents

Main CY62148E MoBL 4-Mbit (512K x 8) Static RAM Features Functional Description Product Portfolio CY62148E MoBL Document #: 38-05442 Rev. *F Page 2 of 10 Logic Block Diagram Pin Configuration 32-pin SOIC/TSOP II Pinout Top View Maximum Ratings Operating Range Electrical Characteristics Capacitance CY62148E MoBL Thermal Resistance Data Retention Waveform AC Test Loads and Waveforms Data Retention Characteristics Switching Characteristics CY62148E MoBL Switching Waveforms Write Cycle No. 1 (WE Controlled, OE HIGH During Write) [19, 20] Read Cycle No. 1 (Address Transition Controlled) [16, 17] Read Cycle No. 2 (OE Controlled) [17, 18] Truth Table Switching Waveforms CY62148E MoBL Ordering Information Package Diagrams Figure 2. 32-pin (450 MIL) Molded SOIC, 51-85081 Package Diagrams 51-85081-*B Document History Page