CY62148E MoBL®
Maximum Ratings
Exceeding maximum ratings may impair the useful life of the device. These user guidelines are not tested.
Storage Temperature | |||
Ambient Temperature with |
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Power Applied | |||
Supply Voltage to Ground |
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Potential | |||
DC Voltage Applied to Outputs |
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in | CCmax | + 0.5V) | |
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Electrical Characteristics (Over the Operating Range)
DC Input Voltage [5, 6] |
| + 0.5V) | ||
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| CCmax |
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Output Current into Outputs (LOW) |
| 20 mA | ||
Static Discharge Voltage |
| > 2001V | ||
(per |
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| >200mA | |||
Operating Range |
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Device | Range | Ambient |
| [7] |
Temperature | VCC | |||
CY62148E | 4.5V to 5.5V | |||
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Parameter | Description |
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| Test Conditions |
| 45 ns |
| 55 ns [2] | Unit | |||
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| Min | Typ [3] | Max | Min | Typ [3] | Max | |||||
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VOH | Output HIGH |
| IOH = |
| 2.4 |
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| 2.4 |
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| V | |
| Voltage |
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VOL | Output LOW Voltage | IOL = 2.1 mA |
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| 0.4 |
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| 0.4 | V | ||
VIH | Input HIGH Voltage | VCC = 4.5V to 5.5V |
| 2.2 |
| VCC + 0.5 | 2.2 |
| VCC + 0.5 | V | ||
VIL | Input LOW voltage | VCC = 4.5V to 5.5V | For TSOPII |
| 0.8 |
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| V | |||
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| For SOIC |
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| 0.6 [8] |
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IIX | Input Leakage |
| GND < VI < VCC |
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| +1 |
| +1 | ∝A | |||
| Current |
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IOZ | Output Leakage |
| GND < VO < VCC, Output Disabled |
| +1 |
| +1 | ∝A | ||||
| Current |
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ICC | VCC Operating |
| f = fmax = 1/tRC | VCC = VCC(max) |
| 15 | 20 |
| 15 | 20 | mA | |
| Supply Current |
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| IOUT = 0 mA |
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| f = 1 MHz |
| 2 | 2.5 |
| 2 | 2.5 |
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| CMOS levels |
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ISB2 [9] | Automatic CE Power |
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| > VCC – 0.2V |
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| 1 | 7 |
| 1 | 7 | ∝A |
| CE |
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| down Current — |
| VIN > VCC – 0.2V or VIN < 0.2V, |
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| CMOS Inputs |
| f = 0, VCC = VCC(max) |
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Capacitance (For All Packages) [10]
Parameter | Description | Test Conditions | Max | Unit |
CIN | Input Capacitance | TA = 25°C, f = 1 MHz, | 10 | pF |
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| VCC = VCC(typ) |
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COUT | Output Capacitance | 10 | pF |
Notes
5.VIL(min) =
6.VIH(max) = VCC+0.75V for pulse durations less than 20 ns.
7.Full device AC operation assumes a minimum of 100 µs ramp time from 0 to VCC(min) and 200 µs wait time after VCC stabilization.
8.Under DC conditions the device meets a VIL of 0.8V. However, in dynamic conditions Input LOW Voltage applied to the device must not be higher than 0.6V. This is applicable to SOIC package only. Refer to AN13470 for details.
9.Only chip enable (CE) must be HIGH at CMOS level to meet the ISB2 spec. Other inputs can be left floating.
10.Tested initially and after any design or process changes that may affect these parameters.
Document #: | Page 3 of 10 |
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