Package Diagrams, Pin Tsop II | Cypress CY62157E manual

CY62157E MoBL®

Package Diagrams

51-85087-*A

Document #: 38-05695 Rev. *C

Page 10 of 12

[+] Feedback

Image 10

Contents

Functional Description1 FeaturesLogic Block Diagram Cypress Semiconductor Corporation Product Portfolio Tsop Vfbga Operating Range Electrical Characteristics Over the Operating RangeMaximum Ratings Capacitance9 AC Test Loads and Waveforms Data Retention Characteristics Over the Operating RangeThermal Resistance9 Data Retention Waveform11 Min Max Unit Read Cycle Switching Characteristics Over the Operating Range45 ns 55 ns Parameter Description Min Write Cycle Read Cycle 2 OE Controlled17 Switching WaveformsRead Cycle 1 Address Transition Controlled16 50% Write Cycle 1 WE Controlled 15, 19, 20 Write Cycle 2 CE 1 or CE 2 Controlled 15, 19, 20 Write Cycle 3 WE Controlled, OE LOW20 Write Cycle 4 BHE/BLE Controlled, OE LOW20 Ordering Information Inputs/Outputs Mode PowerTruth Table BHE BLE Package Diagrams Pin Tsop II Ball Vfbga 6 x 8 x 1 mm Document History Issue Date Orig. Description of ChangeREV ECN no