
CY62167EV30 MoBL®
Maximum Ratings
Exceeding the maximum ratings may impair the useful life of the device. These user guidelines are not tested.
Storage Temperature  | |
Ambient Temperature with  | 
  | 
Power Applied  | |
Supply Voltage to Ground  | 
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Potential  | |
DC Voltage Applied to Outputs  | |
in High Z State[6, 7]  | |
DC Input Voltage[6, 7]  | ||||
Output Current into Outputs (LOW)  | 20 mA  | |||
Static Discharge Voltage  | 
  | >2001V  | ||
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Latch up Current  | 
  | >200 mA  | ||
Operating Range | 
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Device  | 
  | Range  | Ambient  | [8]  | 
  | Temperature  | VCC  | ||
CY62167EV30LL  | Industrial/  | 2.2V to 3.6V  | ||
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Electrical Characteristics
Over the Operating Range
Parameter  | Description  | 
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  | Test Conditions  | 45 ns   | Unit  | |||
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  | Min  | Typ[5]  | Max  | |||||
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VOH  | Output HIGH Voltage  | 
  | 2.2 < VCC < 2.7  | IOH =   | 2.0  | 
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  | V  | ||
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  | 2.7 < VCC < 3.6  | IOH =   | 2.4  | 
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  | V  | ||
VOL  | Output LOW Voltage  | 2.2 < VCC < 2.7  | IOL = 0.1 mA  | 
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  | 0.4  | V  | |||
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  | 2.7 < VCC < 3.6  | IOL = 2.1mA  | 
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  | 0.4  | V  | ||
VIH  | Input HIGH Voltage  | 2.2 < VCC < 2.7  | 
  | 1.8  | 
  | VCC + 0.3V  | V  | |||
  | 
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  | 2.7 < VCC < 3.6  | 
  | 2.2  | 
  | VCC + 0.3V  | V  | ||
VIL  | Input LOW Voltage  | 2.2 < VCC < 2.7  | 
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  | 0.6  | V  | ||||
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  | 2.7 < VCC < 3.6  | For VFBGA package  | 
  | 0.8  | V  | |||
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  | For TSOP I package  | 
  | 0.7[9]  | V  | |
IIX  | Input Leakage Current  | GND < VI < VCC | 
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  | +1  | μA  | ||||
IOZ  | Output Leakage Current  | GND < VO < VCC, Output Disabled  | 
  | +1  | μA  | |||||
ICC  | VCC Operating Supply  | 
  | f = fMAX = 1/tRC  | VCC = VCC(max)  | 
  | 25  | 30  | mA  | ||
  | Current  | 
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  | IOUT = 0 mA  | 
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  | f = 1 MHz  | 
  | 2.2  | 4.0  | mA  | ||||
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  | CMOS levels  | 
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ISB1  | Automatic CE Power Down  | 
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  | 1 > VCC − 0.2V or CE2 < 0.2V  | 
  | 1.5  | 12  | μA  | ||
  | CE  | 
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  | VIN > VCC − 0.2V, VIN < 0.2V,  | 
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  | f = fMAX (Address and Data Only),  | 
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  | f = 0 (OE, WE, BHE and BLE), VCC = 3.60V  | 
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ISB2[10]  | Automatic CE Power Down  | 
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  | 1 > VCC − 0.2V or CE2 < 0.2V,  | 
  | 1.5  | 12  | μA  | ||
  | CE  | 
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  | VIN > VCC − 0.2V or VIN < 0.2V,  | 
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  | f = 0, VCC = 3.60V  | 
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Capacitance
Tested initially and after any design or process changes that may affect these parameters.
Parameter | Description | Test Conditions | Max | Unit | 
CIN  | Input Capacitance  | TA = 25°C, f = 1 MHz,  | 10  | pF  | 
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  | VCC = VCC(typ)  | 
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COUT  | Output Capacitance | 10  | pF  | 
Notes
6.VIL(min) = 
7.VIH(max) = VCC + 0.75V for pulse durations less than 20 ns.
8.Full Device AC operation assumes a 100 μs ramp time from 0 to VCC (min) and 200 μs wait time after VCC stabilization.
9.Under DC conditions the device meets a VIL of 0.8V. However, in dynamic conditions Input LOW Voltage applied to the device must not be higher than 0.7V. This is applicable to TSOP I package only.
10.Only chip enables (CE1 and CE2), byte enables (BHE and BLE) and BYTE must be tied to CMOS levels to meet the ISB2 / ICCDR spec. Other inputs can be left floating
Document #:   | Page 3 of 14  | 
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