CY62167EV30 MoBL®
Document #: 38-05446 Rev. *E Page 4 of 14
Thermal Resistance
Tested initially and after any design or process changes that may affect these parameters.
Parameter Description Test Conditions VFBGA
(6 x 7 x 1mm)
VFBGA
(6 x 8 x 1mm) TSOP I Unit
ΘJA Thermal Resistance
(Junction to Ambient)
Still Air, soldered on a 3 × 4.5 inch,
two-layer printed circuit board
27.74 55 60 °C/W
ΘJC Thermal Resistance
(Junction to Case)
9.84 16 4.3 °C/W
Shaded areas contain preliminary information.
Figure 3. AC Test Loads and Waveforms
Parameters 2.2V to 2.7V 2.7V to 3.6V Unit
R1 16667 1103 Ω
R2 15385 1554 Ω
RTH 8000 645 Ω
VTH 1.20 1.75 V
Data Retention Characteristics
Over the Operating Range
Parameter Description Conditions Min Typ[5] Max Unit
VDR VCC for Data Retention 1.5 V
ICCDR[10] Data Retention Current VCC = 1.5V to 3.0V, CE1 > VCC 0.2V, CE2
< 0.2V, VIN > VCC 0.2V or VIN < 0.2V
Industrial/
Auto-A
-45ZXI
(TSOP I)
8μA
VCC = 1.5V, CE1 > VCC 0.2V, CE2 < 0.2V,
VIN > VCC 0.2V or VIN < 0.2V
Industrial -45BAXI/
-45BVXI/
-45BVI
(VFBGA)
10 μA
tCDR[11] Chip Deselect to Data
Retention Time
0ns
tR[12] Operation Recovery Time tRC ns
Figure 4. Data Retention Waveform
V
CC
V
CC
OUTPUT
R2
30 pF
INCLUDING
JIG AND
SCOPE
GND
90%
10% 90%
10%
Rise Time = 1 V/ns Fall Time = 1 V/ns
OUTPUT V
Equivalent to: THÉVENIN EQUIVALENT
ALL INPUT PULSES
R
TH
R1
Notes
11.Tested initially and after any design or process changes that may affect these parameters.
12.Full device operation requires linear VCC ramp from VDR to VCC(min) > 100 μs or stable at VCC(min) > 100 μs.
13.BHE.BLE is the AND of both BHE and BLE. Deselect the chip by either disabling the chip enable signals or by disabling both BHE and BLE.
VCC(min)
VCC(min)
tCDR
VDR >1.5 V
DATA RETENTION MODE
tR
CE1 or
VCC
BHE.BLE
CE2
or
[13]
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