CY7B9910
CY7B9920
Electrical Characteristics Over the Operating Range
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| CY7B9910 | CY7B9920 |
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Parameter | Description |
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| Min | Max | Min | Max | |||||
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VOH | Output HIGH Voltage | VCC = Min, IOH = | 2.4 |
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| V | ||
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| VCC = Min, IOH |
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VOL | Output LOW Voltage | VCC = Min, IOL = 46 mA |
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| 0.45 |
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| V | |
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| VCC = Min, IOL = 46 mA |
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| 0.45 |
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VIH | Input HIGH Voltage |
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| 2.0 | VCC | VCC – | VCC | V |
| (REF and FB inputs only) |
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| 1.35 |
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VIL | Input LOW Voltage |
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| 0.8 | 1.35 | V | ||
| (REF and FB inputs only) |
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VIHH | Three Level Input HIGH | Min ≤ VCC ≤ Max |
| VCC – 1V | VCC | VCC – 1V | VCC | V | |
| Voltage (Test, FS)[4] |
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VIMM | Three Level Input MID | Min ≤ VCC ≤ Max |
| VCC/2 – | VCC/2 + | VCC/2 – | VCC/2 + | V | |
| Voltage (Test, FS)[4] |
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| 500 mV | 500 mV | 500 mV | 500 mV |
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VILL | Three Level Input LOW | Min ≤ VCC ≤ Max |
| 0.0 | 1.0 | 0.0 | 1.0 | V | |
| Voltage (Test, FS)[4] |
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IIH | Input HIGH Leakage Current | VCC = Max, VIN = Max |
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| 10 |
| 10 | μA | |
| (REF and FB inputs only) |
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IIL | Input LOW Leakage Current | VCC = Max, VIN = 0.4V |
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| μA | |||
| (REF and FB inputs only) |
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IIHH | Input HIGH Current | VIN = VCC |
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| 200 |
| 200 | μA | |
| (Test, FS) |
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IIMM | Input MID Current | VIN = VCC/2 |
| 50 | 50 | μA | |||
| (Test, FS) |
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IILL | Input LOW Current | VIN = GND |
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| μA | |||
| (Test, FS) |
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IOS | Output Short Circuit | VCC | = Max, VOUT |
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| N/A | mA | |
| Current[5] | = GND (25°C only) |
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ICCQ | Operating Current Used by | VCCN = VCCQ = Max All | Com’l |
| 85 |
| 85 | mA | |
| Internal Circuitry | Input |
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| Mil/Ind |
| 90 |
| 90 |
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| Selects Open |
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ICCN | Output Buffer Current per | VCCN = VCCQ = Max |
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| 14 |
| 19 | mA | |
| Output Pair[6] | I | = 0 mA |
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| OUT |
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| Input Selects Open, fMAX |
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| 104[5] |
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PD | Power Dissipation per | VCCN = VCCQ = Max |
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| 78 |
| mW | ||
| Output Pair[7] | I | = 0 mA |
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| OUT |
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| Input Selects Open, fMAX |
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Notes |
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4.These inputs are normally wired to VCC, GND, or left unconnected (actual threshold voltages vary as a percentage of VCC). Internal termination resistors hold unconnected inputs at VCC/2. If these inputs are switched, the function and timing of the outputs may glitch and the PLL may require an additional tLOCK time before all data sheet limits are achieved.
5.Tested one output at a time, output shorted for less than one second, less than 10% duty cycle. Room temperature only. CY7B9920 outputs are not short circuit protected.
6.Total output current per output pair is approximated by the following expression that includes device current plus load current: CY7B9910:
ICCN = [(4 + 0.11F) + [((835 – 3F)/Z) + (.0022FC)]N] x 1.1 CY7B9920:
ICCN = [(3.5+.17F) + [((1160 – 2.8F)/Z) + (.0025FC)]N] x 1.1 Where
F = frequency in MHz
C = capacitive load in pF
Z = line impedance in ohms
N = number of loaded outputs; 0, 1, or 2 FC = F < C.
7.Total power dissipation per output pair is approximated by the following expression that includes device power dissipation plus power dissipation due to the load circuit: CY7B9910:
PD = [(22 + 0.61F) + [((1550 – 2.7F)/Z) + (.0125FC)]N] x 1.1 CY7B9920:
PD = [(19.25+ 0.94F) + [((700 + 6F)/Z) + (.017FC)]N] x 1.1.See note 3 for variable definition.
Document Number: | Page 4 of 11 |
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