AC Timing Diagrams

CY7B9910

CY7B9920

tJR

Figure 2. Zero Skew and Zero Delay Clock Driver

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Document Number: 38-07135 Rev. *B

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Contents

Features Block Diagram DescriptionLogic Block Diagram Functional Description Pin Configuration Test ModeSignal Name Description Pin Definitions Ambient Range Maximum RatingsOperating Range Electrical Characteristics Over the Operating Range Parameter Description Test Conditions Switching CharacteristicsCapacitance Operating Clock FS = LOW 1 MHz Frequency in MHz FS = MID 1 FS = High 1, 2Zero Output Skew All Outputs 13 Output Rise Time 17 Propagation Delay, REF Rise to FB Rise +0.7 Over the Operating Range11Device-to-Device Skew 8 Output Duty Cycle Variation +1.2 AC Timing Diagrams AC Timing Diagrams Operational Mode Descriptions Board-to-Board Clock Distribution Package Diagram Ordering InformationAccuracy Ordering Code Package Type Operating Range Pb-Free Issue Date Orig. Description of Change Document History