CY7C1399B

Switching Characteristics Over the Operating Range[5] (Continued)

 

 

 

 

 

 

 

1399B–15

 

1399B–20

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Parameter

 

 

 

Description

 

Min.

Max.

 

Min.

 

Max.

Unit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

READ CYCLE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tRC

 

Read Cycle Time

 

15

 

 

 

20

 

 

 

ns

tAA

 

Address to Data Valid

 

 

15

 

 

 

 

20

 

ns

tOHA

 

Data Hold from Address Change

 

3

 

 

 

3

 

 

 

 

ns

tACE

 

 

 

LOW to Data Valid

 

 

15

 

 

 

 

20

 

ns

 

CE

 

 

 

 

 

 

 

 

tDOE

 

 

 

LOW to Data Valid

 

 

6

 

 

 

 

7

 

ns

 

OE

 

 

 

 

 

 

 

 

tLZOE

 

 

 

LOW to Low Z[6]

 

0

 

 

 

0

 

 

 

 

ns

 

OE

 

 

 

 

 

 

 

 

tHZOE

 

 

 

HIGH to High Z[6, 7]

 

 

6

 

 

 

 

6

 

ns

 

OE

 

 

 

 

 

 

 

tLZCE

 

 

 

LOW to Low Z[6]

 

3

 

 

 

3

 

 

 

 

ns

 

CE

 

 

 

 

 

 

 

 

tHZCE

 

 

 

HIGH to High Z[6, 7]

 

 

7

 

 

 

 

7

 

ns

 

CE

 

 

 

 

 

 

 

tPU

 

 

 

LOW to Power-Up

 

0

 

 

 

0

 

 

 

 

ns

 

CE

 

 

 

 

 

 

 

 

 

tPD

 

 

 

HIGH to Power-Down

 

 

15

 

 

 

 

20

 

ns

 

CE

 

 

 

 

 

 

 

 

WRITE CYCLE[8, 9]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tWC

 

Write Cycle Time

 

15

 

 

 

20

 

 

 

ns

tSCE

 

 

 

LOW to Write End

 

10

 

 

 

12

 

 

 

ns

 

CE

 

 

 

 

 

 

 

 

tAW

 

Address Set-Up to Write End

 

10

 

 

 

12

 

 

 

ns

tHA

 

Address Hold from Write End

 

0

 

 

 

0

 

 

 

 

ns

tSA

 

Address Set-Up to Write Start

 

0

 

 

 

0

 

 

 

 

ns

tPWE

 

 

 

Pulse Width

 

10

 

 

 

12

 

 

 

ns

 

WE

 

 

 

 

 

 

 

tSD

 

Data Set-Up to Write End

 

8

 

 

 

10

 

 

 

ns

tHD

 

Data Hold from Write End

 

0

 

 

 

0

 

 

 

 

ns

tHZWE

 

 

 

LOW to High Z[8]

 

 

7

 

 

 

 

7

 

ns

 

WE

 

 

 

 

 

 

 

tLZWE

 

 

 

HIGH to Low Z[6]

 

3

 

 

 

3

 

 

 

 

ns

 

WE

 

 

 

 

 

 

 

 

Data Retention Characteristics (Over the Operating Range - L version only)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Parameter

 

 

Description

Conditions

 

 

Min.

 

Max.

 

Unit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDR

 

 

VCC for Data Retention

 

 

 

 

2.0

 

 

 

 

V

ICCDR

 

 

Data Retention Current

Com’l

VCC = VDR = 2.0V,

 

 

0

 

 

20

 

uA

 

 

 

 

 

 

CE > VCC – 0.3V,

 

 

 

 

 

 

 

 

 

tCDR

 

 

Chip Deselect to Data

 

 

0

 

 

 

 

 

ns

 

 

VIN > VCC – 0.3V or

 

 

 

 

 

 

 

 

 

 

 

Retention Time

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIN < 0.3V

 

 

 

 

 

 

 

 

 

tR

 

 

Operation Recovery Time

 

 

tRC

 

 

 

 

ns

 

 

 

 

 

 

 

 

 

 

Document #: 38-05071 Rev. *A

Page 5 of 10

Page 5
Image 5
Cypress CY7C1399B 1399B-15 1399B-20 Parameter Description Min Max Unit, Parameter Description Conditions Min Max Unit

CY7C1399B specifications

The Cypress CY7C1399B is a high-performance static random-access memory (SRAM) device that belongs to the family of asynchronous CMOS SRAMs. It is designed to deliver superior speed and efficiency, making it ideal for a multitude of applications in various fields, including telecommunications, automotive, and consumer electronics.

One of the key features of the CY7C1399B is its high-speed operation, capable of achieving access times as low as 12 nanoseconds. This allows for rapid data retrieval, which is crucial in applications requiring fast data processing and real-time performance. Moreover, it operates with a single supply voltage of 2.0V to 3.6V, providing flexibility for power-sensitive designs.

The chip comes with a capacity of 16 megabits, which enables it to store substantial amounts of data. Furthermore, it features a burst mode operation that allows for efficient access to multiple consecutive data locations. This capability makes it particularly useful in applications such as video processing, where quick data retrieval is essential.

Another prominent characteristic of the CY7C1399B is its low power consumption. The device boasts both active and standby power modes, which help minimize energy usage, making it suitable for battery-operated devices. This is increasingly becoming a vital factor for consumer electronics, where energy efficiency is a priority.

In terms of interface, the CY7C1399B uses a conventional parallel interface, compatible with a variety of microcontrollers and processors. The device also supports an asynchronous read and write operation, which simplifies integration into existing systems.

The chip is built using advanced 0.18-micron CMOS technology, which not only enhances its performance but also contributes to its reliability and durability. This technology allows the CY7C1399B to achieve high integration density, resulting in a smaller footprint on printed circuit boards (PCBs).

With a combination of high-speed operational characteristics, low power consumption, and substantial data capacity, the Cypress CY7C1399B stands out as an excellent choice for designers seeking efficient memory solutions that can support the demands of modern electronic systems.