CY7C185
6
Notes:
14. The minimum write cycle time for write cycle #3 (WE controlled, OE LOW) is the sum of tHZWE and tSD.
15. If CE1 goes HIGH or CE2 goes LOW simultaneously with WE HIGH, the output remains in a hi gh-impedance state.
Switching Waveforms (continued)
tWC
tAW
tSA
tHA
tHD
tSD
tSCE1
WE
DATA I/O
ADDRESS
CE1
C185–9
DATAIN VALID
tSCE2
CE2

W

rite Cycle No. 2 (CE Controlled)[12,13,14]
tHD
tSD
tLZWE
tSA
tHA
tAW
tWC
tHZWE C185–10
DATA INVALID
tSCE1
tSCE2
CE1
CE2
ADDRESS
DATA I/O
WE
Write Cycle No. 3 (WE Controlled, OE LOW)[12,13,14,15]
NOTE 13