PRELIMINARYCY7C656xx
7.0Pin Description Table
Table
Table
CY7C65640B / | CY7C65620 |
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CY7C65630 Pin | Pin | Name | Type | Default | Description |
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3 | 3 | VCC | Power | N/A | VCC. This signal provides power to the chip. |
7 | 7 | VCC | Power | N/A | VCC. This signal provides power to the chip. |
11 | 11 | VCC | Power | N/A | VCC. This signal provides power to the chip. |
15 | 15 | VCC | Power | N/A | VCC. This signal provides power to the chip. |
19 | 19 | VCC | Power | N/A | VCC. This signal provides power to the chip. |
23 | 23 | VCC | Power | N/A | VCC. This signal provides power to the chip. |
27 | 27 | VCC | Power | N/A | VCC. This signal provides power to the chip. |
33 | 33 | VCC | Power | N/A | VCC. This signal provides power to the chip. |
39 | 39 | VCC | Power | N/A | VCC. This signal provides power to the chip. |
55 | 55 | VCC | Power | N/A | VCC. This signal provides power to the chip. |
4 | 4 | GND | Power | N/A | GND. Connect to Ground with as short a path as possible. |
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8 | 8 | GND | Power | N/A | GND. Connect to Ground with as short a path as possible. |
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12 | 12 | GND | Power | N/A | GND. Connect to Ground with as short a path as possible. |
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16 | 16 | GND | Power | N/A | GND. Connect to Ground with as short a path as possible. |
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20 | 20 | GND | Power | N/A | GND. Connect to Ground with as short a path as possible. |
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24 | 24 | GND | Power | N/A | GND. Connect to Ground with as short a path as possible. |
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28 | 28 | GND | Power | N/A | GND. Connect to Ground with as short a path as possible. |
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34 | 34 | GND | Power | N/A | GND. Connect to Ground with as short a path as possible. |
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40 | 40 | GND | Power | N/A | GND. Connect to Ground with as short a path as possible. |
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47 | 47 | GND | Power | N/A | GND. Connect to Ground with as short a path as possible. |
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50 | 50 | GND | Power | N/A | GND. Connect to Ground with as short a path as possible. |
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56 | 56 | GND | Power | N/A | GND. Connect to Ground with as short a path as possible. |
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21 | 21 | XIN | Input | N/A | |
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22 | 22 | XOUT | Outpu | N/A |
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46 | 46 | RESET# | Input | N/A | Active LOW Reset. This pin resets the entire chip. It is |
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| normally tied to VCC through a 100K resistor, and to GND |
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| through a |
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45 | 45 | SELFPWR | Input | N/A | Indicator for bus/self powered. 0 is bus powered, 1 is self- |
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| powered. |
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26 | 26 | VBUSPOWER | Input | N/A | VBUS. Connect to the VBUS pin of the upstream connector. |
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| This signal indicates to the hub that it is in a connected state, |
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| and may enable the D+ |
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| connection. (The hub will do so after the external EEPROM is |
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| read, unless it is put into a |
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| hub). |
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SPI Interface |
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25 | 25 | SPI_CS | O | O | SPI Chip Select. Connect to CS pin of the EEPROM. |
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48 | 48 | SPI_SCK | O | O | SPI Clock. Connect to EEPROM SCK pin. |
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49 | 49 | SPI_SD | I/O/Z | Z | SPI Dataline Connect to GND with |
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| Data I/O pins of the EEPROM. |
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Note: |
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3.Unused port DD+/DD– lines can be left floating. The port power, amber, and green LED pins should be left unconnected, and the overcurrent pin should be tied HIGH. The overcurrent pin is an input and it should not be left floating.
Document #: | Page 8 of 23 |