dCS Verona User Manual | Manual for Software Issue 1.0x |
dCS Ltd | September 2004 |
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GENERAL TECHNICAL INFORMATION
Clock Dither
Phase Locked Loop (PLL) circuits are used in digital audio equipment to synchronise the local clock to the clock in the incoming data stream. PLL circuits tend to operate in the centre of a “dead band” when locked. In this band, the sensitivity of the loop to phase errors is reduced. This is somewhat similar to the
The Verona can be set to add dither to the clock outputs, to keep the PLL active when it is locked. The dither takes the form of a small, random timing offset that is noise shaped, so that can be easily filtered out by the PLL. Unlike jitter, this offset is statistically well controlled, so that the effect averages out to zero.
Does a dithered clock make an audible difference? Turn it on and let your ears decide.
Manual filename: Verona Manual v1.0x.doc | Page 26 | email: more@dcsltd.co.uk |
English version |
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