EM78612
Universal Serial Bus Microcontroller
Product Specification (V1.0)03.2 2.2006 •
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(This specification is subject to change without further notice)
IOCF (Interrupt Mask Register) Default Value: (0B_0000_00 00)
7 6 5 4 3 2 1 0
--Port 5 State
Change_IE
USB Host
Resume_1E
USB
Reset_IE
USB
Suspend_IE EP0_IE TCC_IE
IOCF [0~5] TCC / EP0 / USB Suspend / USB Reset / U SB Host Resume / Port 5
State C hange enable bits. These eight bits respectively control the
function of TCC interrupt, EP0 interrupt, USB Suspend interrupt, USB
Reset interrupt, USB Host Resume interrupt, Port5 State C hange
interrupt, Individual interrupt is enabled by setting its associated control
bit in the IOCF to "1".
1: Enable Interrupt.
0: Disable Interrupt.
IOCF[6] Default value is zero and do not modify it.
Only when the global interrupt is enabl ed by the ENI instruction that the individual
interrupt will work. After DISI instruction, any interrupt will not work even if the
respective control bits of IOCF are set to 1.
The USB Host Resume Interrupt works only under Dual clock mode. This is
because when the MCU is under sleep mode, it will be waked up by the UDC Resum e
signal automatically.
7.2.2 USB Application FIFOsFor USB Application, EM78612 provides an 8-b yte First-In-First-Out (FIFO) buffer for
each endpoint. The buffer cannot be accessed directly. However, a corresponding Data
Byte Pointer register for each endpoint is made available to address the individual byte
of the FIFO buffer. The content of the individual byte will map to a special reg ister.