Chapter 3 Programming
MVME6100
The MVME6100 IPMC module PCI arbitration is performed by the MV64360 ASIC. The internal PCI arbiter REQ#/GNT# signals are multiplexed on the MV64360 MPP[31:0] pins. The internal PCI arbiter is disabled by default (the MPP pins function as general purpose inputs). Software will configure the MPP pins to function as request/grant pairs for the internal PCI arbiter.
The IPMC module arbitration pairs for the MVME6100 are assigned to the MPP pins as follows;
■MPP pin 8, PCI Bus Grant (PIB device on IPMC module)
■MPP pin 9, PCI Bus Request (PIB device on IPMC module)
■MPP pin 12, PCI Bus Grant (SCSI device on IPMC module)
■MPP pin 13, PCI Bus Request (SCSI device on IPMC module)
Interrupt Assignments
The interrupt architecture for the IPMC712 and IPMC761 is fully compliant with the PowerPlusII Programming Specification for a single processor board configuration.
MVME5100 IPMC Module Interrupt Assignments
Legacy interrupt assignment for the
The MVME5100 Ethernet port 2 is routed to the PIB’s IRQ10 input. The SCSI interrupt on the IPMC761 is also routed to the PIB at IRQ14. The SCSI device is connected to the INTA# pin
The Hawk interrupt assignments are shown below:
Table 3-6. Hawk MPIC Interrupt Assignments
MPICI | Edge/Leve |
|
| Note |
RQ | l | Polarity | Interrupt Source | s |
IRQ0 | Level | High | PIB (8259) in PMC Slot 1 | 1 |
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|
|
IRQ9 | Level | Low | SCSI Controller interrupt shall be connected to | 2 |
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| INTA# pin |
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Notes
1. This interrupt provided for software compatibility with MVME2700.
IPMC7126E/7616E I/O Module Installation and Use (6806800A45B) | 19 |
